subject:"\[PATCH v2 1\/8\] target\/i386\: Restrict X86CPUFeatureWord to X86 targets"

Re: [PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

2020-03-18 Thread Philippe Mathieu-Daudé


Hi Eduardo,

On 3/16/20 1:03 AM, Philippe Mathieu-Daudé wrote:

Move out x86-specific structures from generic machine code.


If you have to respin "x86 and machine queue" please consider including 
this patch :)




Acked-by: Richard Henderson 
Signed-off-by: Philippe Mathieu-Daudé 
---
  qapi/machine-target.json   | 45 ++
  qapi/machine.json  | 42 ---
  target/i386/cpu.c  |  2 +-
  target/i386/machine-stub.c | 22 +++
  target/i386/Makefile.objs  |  3 ++-
  5 files changed, 70 insertions(+), 44 deletions(-)
  create mode 100644 target/i386/machine-stub.c

diff --git a/qapi/machine-target.json b/qapi/machine-target.json
index f2c82949d8..fb7a4b7850 100644
--- a/qapi/machine-target.json
+++ b/qapi/machine-target.json
@@ -3,6 +3,51 @@
  # This work is licensed under the terms of the GNU GPL, version 2 or later.
  # See the COPYING file in the top-level directory.
  
+##

+# @X86CPURegister32:
+#
+# A X86 32-bit register
+#
+# Since: 1.5
+##
+{ 'enum': 'X86CPURegister32',
+  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ],
+  'if': 'defined(TARGET_I386)' }
+
+##
+# @X86CPUFeatureWordInfo:
+#
+# Information about a X86 CPU feature word
+#
+# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
+#
+# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
+#   feature word
+#
+# @cpuid-register: Output register containing the feature bits
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 1.5
+##
+{ 'struct': 'X86CPUFeatureWordInfo',
+  'data': { 'cpuid-input-eax': 'int',
+'*cpuid-input-ecx': 'int',
+'cpuid-register': 'X86CPURegister32',
+'features': 'int' },
+  'if': 'defined(TARGET_I386)' }
+
+##
+# @DummyForceArrays:
+#
+# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
+#
+# Since: 2.5
+##
+{ 'struct': 'DummyForceArrays',
+  'data': { 'unused': ['X86CPUFeatureWordInfo'] },
+  'if': 'defined(TARGET_I386)' }
+
  ##
  # @CpuModelInfo:
  #
diff --git a/qapi/machine.json b/qapi/machine.json
index 6c11e3cf3a..de05730704 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -505,48 +505,6 @@
 'dst': 'uint16',
 'val': 'uint8' }}
  
-##

-# @X86CPURegister32:
-#
-# A X86 32-bit register
-#
-# Since: 1.5
-##
-{ 'enum': 'X86CPURegister32',
-  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
-
-##
-# @X86CPUFeatureWordInfo:
-#
-# Information about a X86 CPU feature word
-#
-# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
-#
-# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
-#   feature word
-#
-# @cpuid-register: Output register containing the feature bits
-#
-# @features: value of output register, containing the feature bits
-#
-# Since: 1.5
-##
-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-'*cpuid-input-ecx': 'int',
-'cpuid-register': 'X86CPURegister32',
-'features': 'int' } }
-
-##
-# @DummyForceArrays:
-#
-# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
-#
-# Since: 2.5
-##
-{ 'struct': 'DummyForceArrays',
-  'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
-
  ##
  # @NumaCpuOptions:
  #
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index a84553e50c..0753fe4935 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -37,7 +37,7 @@
  #include "qemu/option.h"
  #include "qemu/config-file.h"
  #include "qapi/error.h"
-#include "qapi/qapi-visit-machine.h"
+#include "qapi/qapi-visit-machine-target.h"
  #include "qapi/qapi-visit-run-state.h"
  #include "qapi/qmp/qdict.h"
  #include "qapi/qmp/qerror.h"
diff --git a/target/i386/machine-stub.c b/target/i386/machine-stub.c
new file mode 100644
index 00..cb301af057
--- /dev/null
+++ b/target/i386/machine-stub.c
@@ -0,0 +1,22 @@
+/*
+ * QAPI x86 CPU features stub
+ *
+ * Copyright (c) 2020 Red Hat, Inc.
+ *
+ * Author:
+ *   Philippe Mathieu-Daudé 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qapi/qapi-visit-machine-target.h"
+
+void visit_type_X86CPUFeatureWordInfoList(Visitor *v, const char *name,
+  X86CPUFeatureWordInfoList **obj,
+  Error **errp)
+{
+}
diff --git a/target/i386/Makefile.objs b/target/i386/Makefile.objs
index 48e0c28434..1cdfc9f50c 100644
--- a/target/i386/Makefile.objs
+++ b/target/i386/Makefile.objs
@@ -17,6 +17,7 @@ obj-$(CONFIG_HAX) += hax-all.o hax-mem.o hax-posix.o
  endif
  obj-$(CONFIG_HVF) += hvf/
  obj-$(CONFIG_WHPX) += whpx-all.o
-endif
+endif # CONFIG_SOFTMMU
  obj-$(CONFIG_SEV) += sev.o
  obj-$(call

Re: [PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

2020-03-16 Thread Philippe Mathieu-Daudé


On 3/16/20 1:29 AM, Aleksandar Markovic wrote:



On Monday, March 16, 2020, Philippe Mathieu-Daudé > wrote:


Move out x86-specific structures from generic machine code.


Philippe,

I a kind of have hard time understanding what is achieved with this 
patch. Is this pure code moving/reorganization? What is the logical 
connection between this patch and the whole series (that is about 
removing unneeded building for user mode)? How does this patch affect 
build time for user mode?


This code ends up in all linux-user binaries:

$ make clean mipsel-linux-user/all
$ fgrep -r X86CPURegister32
Binary file qapi/qapi-visit-machine.o matches
qapi/qapi-visit-machine.h:void visit_type_X86CPURegister32(Visitor *v, 
const char *name, X86CPURegister32 *obj, Error **errp);

qapi/qapi-types-machine.c:const QEnumLookup X86CPURegister32_lookup = {
qapi/qapi-types-machine.h:typedef enum X86CPURegister32 {
qapi/qapi-types-machine.h:} X86CPURegister32;
qapi/qapi-types-machine.h:#define X86CPURegister32_str(val) \
qapi/qapi-types-machine.h:qapi_enum_lookup(_lookup, 
(val))

qapi/qapi-types-machine.h:extern const QEnumLookup X86CPURegister32_lookup;
qapi/qapi-types-machine.h:X86CPURegister32 cpuid_register;
Binary file qapi/qapi-events-machine.o matches
Binary file qapi/qapi-types-machine.o matches
qapi/qapi-doc.texi:@deftp {Enum} X86CPURegister32
qapi/qapi-doc.texi:@item @code{cpuid-register: X86CPURegister32}
qapi/qapi-visit-machine.c:void visit_type_X86CPURegister32(Visitor *v, 
const char *name, X86CPURegister32 *obj, Error **errp)
qapi/qapi-visit-machine.c:visit_type_enum(v, name, , 
_lookup, errp);
qapi/qapi-visit-machine.c:visit_type_X86CPURegister32(v, 
"cpuid-register", >cpuid_register, );

Binary file hw/core/qdev.o matches
Binary file hw/core/cpu.o matches
Binary file libqemuutil.a matches
Binary file mipsel-linux-user/qemu-mipsel matches
\---/

By restricting this structure on the x86 architecture, this is less time 
compiling unused code on others archs, and resulting binary is smaller too.




Sincerely,
Aleksandar


Acked-by: Richard Henderson mailto:richard.hender...@linaro.org>>
Signed-off-by: Philippe Mathieu-Daudé mailto:phi...@redhat.com>>
---
  qapi/machine-target.json   | 45 ++
  qapi/machine.json          | 42 ---
  target/i386/cpu.c          |  2 +-
  target/i386/machine-stub.c | 22 +++
  target/i386/Makefile.objs  |  3 ++-
  5 files changed, 70 insertions(+), 44 deletions(-)
  create mode 100644 target/i386/machine-stub.c

diff --git a/qapi/machine-target.json b/qapi/machine-target.json
index f2c82949d8..fb7a4b7850 100644
--- a/qapi/machine-target.json
+++ b/qapi/machine-target.json
@@ -3,6 +3,51 @@
  # This work is licensed under the terms of the GNU GPL, version 2
or later.
  # See the COPYING file in the top-level directory.

+##
+# @X86CPURegister32:
+#
+# A X86 32-bit register
+#
+# Since: 1.5
+##
+{ 'enum': 'X86CPURegister32',
+  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ],
+  'if': 'defined(TARGET_I386)' }
+
+##
+# @X86CPUFeatureWordInfo:
+#
+# Information about a X86 CPU feature word
+#
+# @cpuid-input-eax: Input EAX value for CPUID instruction for that
feature word
+#
+# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
+#                   feature word
+#
+# @cpuid-register: Output register containing the feature bits
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 1.5
+##
+{ 'struct': 'X86CPUFeatureWordInfo',
+  'data': { 'cpuid-input-eax': 'int',
+            '*cpuid-input-ecx': 'int',
+            'cpuid-register': 'X86CPURegister32',
+            'features': 'int' },
+  'if': 'defined(TARGET_I386)' }
+
+##
+# @DummyForceArrays:
+#
+# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList
internally
+#
+# Since: 2.5
+##
+{ 'struct': 'DummyForceArrays',
+  'data': { 'unused': ['X86CPUFeatureWordInfo'] },
+  'if': 'defined(TARGET_I386)' }
+
  ##
  # @CpuModelInfo:
  #
diff --git a/qapi/machine.json b/qapi/machine.json
index 6c11e3cf3a..de05730704 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -505,48 +505,6 @@
     'dst': 'uint16',
     'val': 'uint8' }}

-##
-# @X86CPURegister32:
-#
-# A X86 32-bit register
-#
-# Since: 1.5
-##
-{ 'enum': 'X86CPURegister32',
-  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
-
-##
-# @X86CPUFeatureWordInfo:
-#
-# Information about a X86 CPU feature word
-#
-# @cpuid-input-eax: Input EAX value for CPUID instruction

Re: [PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

2020-03-15 Thread Aleksandar Markovic

On Monday, March 16, 2020, Aleksandar Markovic 
wrote:

>
>
> On Monday, March 16, 2020, Philippe Mathieu-Daudé 
> wrote:
>
>> Move out x86-specific structures from generic machine code.
>>
>>
> Philippe,
>
> I a kind of have hard time understanding what is achieved with this patch.
> Is this pure code moving/reorganization? What is the logical connection
> between this patch and the whole series (that is about removing unneeded
> building for user mode)? How does this patch affect build time for user
> mode?
>
> Sincerely,
> Aleksandar
>
>
Ugh, I think I mixed up your two series. You write too much code. :) ;)


>
>
>> Acked-by: Richard Henderson 
>> Signed-off-by: Philippe Mathieu-Daudé 
>> ---
>>  qapi/machine-target.json   | 45 ++
>>  qapi/machine.json  | 42 ---
>>  target/i386/cpu.c  |  2 +-
>>  target/i386/machine-stub.c | 22 +++
>>  target/i386/Makefile.objs  |  3 ++-
>>  5 files changed, 70 insertions(+), 44 deletions(-)
>>  create mode 100644 target/i386/machine-stub.c
>>
>> diff --git a/qapi/machine-target.json b/qapi/machine-target.json
>> index f2c82949d8..fb7a4b7850 100644
>> --- a/qapi/machine-target.json
>> +++ b/qapi/machine-target.json
>> @@ -3,6 +3,51 @@
>>  # This work is licensed under the terms of the GNU GPL, version 2 or
>> later.
>>  # See the COPYING file in the top-level directory.
>>
>> +##
>> +# @X86CPURegister32:
>> +#
>> +# A X86 32-bit register
>> +#
>> +# Since: 1.5
>> +##
>> +{ 'enum': 'X86CPURegister32',
>> +  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ],
>> +  'if': 'defined(TARGET_I386)' }
>> +
>> +##
>> +# @X86CPUFeatureWordInfo:
>> +#
>> +# Information about a X86 CPU feature word
>> +#
>> +# @cpuid-input-eax: Input EAX value for CPUID instruction for that
>> feature word
>> +#
>> +# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
>> +#   feature word
>> +#
>> +# @cpuid-register: Output register containing the feature bits
>> +#
>> +# @features: value of output register, containing the feature bits
>> +#
>> +# Since: 1.5
>> +##
>> +{ 'struct': 'X86CPUFeatureWordInfo',
>> +  'data': { 'cpuid-input-eax': 'int',
>> +'*cpuid-input-ecx': 'int',
>> +'cpuid-register': 'X86CPURegister32',
>> +'features': 'int' },
>> +  'if': 'defined(TARGET_I386)' }
>> +
>> +##
>> +# @DummyForceArrays:
>> +#
>> +# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList
>> internally
>> +#
>> +# Since: 2.5
>> +##
>> +{ 'struct': 'DummyForceArrays',
>> +  'data': { 'unused': ['X86CPUFeatureWordInfo'] },
>> +  'if': 'defined(TARGET_I386)' }
>> +
>>  ##
>>  # @CpuModelInfo:
>>  #
>> diff --git a/qapi/machine.json b/qapi/machine.json
>> index 6c11e3cf3a..de05730704 100644
>> --- a/qapi/machine.json
>> +++ b/qapi/machine.json
>> @@ -505,48 +505,6 @@
>> 'dst': 'uint16',
>> 'val': 'uint8' }}
>>
>> -##
>> -# @X86CPURegister32:
>> -#
>> -# A X86 32-bit register
>> -#
>> -# Since: 1.5
>> -##
>> -{ 'enum': 'X86CPURegister32',
>> -  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
>> -
>> -##
>> -# @X86CPUFeatureWordInfo:
>> -#
>> -# Information about a X86 CPU feature word
>> -#
>> -# @cpuid-input-eax: Input EAX value for CPUID instruction for that
>> feature word
>> -#
>> -# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
>> -#   feature word
>> -#
>> -# @cpuid-register: Output register containing the feature bits
>> -#
>> -# @features: value of output register, containing the feature bits
>> -#
>> -# Since: 1.5
>> -##
>> -{ 'struct': 'X86CPUFeatureWordInfo',
>> -  'data': { 'cpuid-input-eax': 'int',
>> -'*cpuid-input-ecx': 'int',
>> -'cpuid-register': 'X86CPURegister32',
>> -'features': 'int' } }
>> -
>> -##
>> -# @DummyForceArrays:
>> -#
>> -# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList
>> internally
>> -#
>> -# Since: 2.5
>> -##
>> -{ 'struct': 'DummyForceArrays',
>> -  'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
>> -
>>  ##
>>  # @NumaCpuOptions:
>>  #
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index a84553e50c..0753fe4935 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
>> @@ -37,7 +37,7 @@
>>  #include "qemu/option.h"
>>  #include "qemu/config-file.h"
>>  #include "qapi/error.h"
>> -#include "qapi/qapi-visit-machine.h"
>> +#include "qapi/qapi-visit-machine-target.h"
>>  #include "qapi/qapi-visit-run-state.h"
>>  #include "qapi/qmp/qdict.h"
>>  #include "qapi/qmp/qerror.h"
>> diff --git a/target/i386/machine-stub.c b/target/i386/machine-stub.c
>> new file mode 100644
>> index 00..cb301af057
>> --- /dev/null
>> +++ b/target/i386/machine-stub.c
>> @@ -0,0 +1,22 @@
>> +/*
>> + * QAPI x86 CPU features stub
>> + *
>> + * Copyright (c) 2020 Red Hat, Inc.
>> + *
>> + * Author:
>> + *   Philippe Mathieu-Daudé 
>> + *
>> + * This work is licensed under the terms

Re: [PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

2020-03-15 Thread Aleksandar Markovic

On Monday, March 16, 2020, Philippe Mathieu-Daudé  wrote:

> Move out x86-specific structures from generic machine code.
>
>
Philippe,

I a kind of have hard time understanding what is achieved with this patch.
Is this pure code moving/reorganization? What is the logical connection
between this patch and the whole series (that is about removing unneeded
building for user mode)? How does this patch affect build time for user
mode?

Sincerely,
Aleksandar




> Acked-by: Richard Henderson 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  qapi/machine-target.json   | 45 ++
>  qapi/machine.json  | 42 ---
>  target/i386/cpu.c  |  2 +-
>  target/i386/machine-stub.c | 22 +++
>  target/i386/Makefile.objs  |  3 ++-
>  5 files changed, 70 insertions(+), 44 deletions(-)
>  create mode 100644 target/i386/machine-stub.c
>
> diff --git a/qapi/machine-target.json b/qapi/machine-target.json
> index f2c82949d8..fb7a4b7850 100644
> --- a/qapi/machine-target.json
> +++ b/qapi/machine-target.json
> @@ -3,6 +3,51 @@
>  # This work is licensed under the terms of the GNU GPL, version 2 or
> later.
>  # See the COPYING file in the top-level directory.
>
> +##
> +# @X86CPURegister32:
> +#
> +# A X86 32-bit register
> +#
> +# Since: 1.5
> +##
> +{ 'enum': 'X86CPURegister32',
> +  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ],
> +  'if': 'defined(TARGET_I386)' }
> +
> +##
> +# @X86CPUFeatureWordInfo:
> +#
> +# Information about a X86 CPU feature word
> +#
> +# @cpuid-input-eax: Input EAX value for CPUID instruction for that
> feature word
> +#
> +# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
> +#   feature word
> +#
> +# @cpuid-register: Output register containing the feature bits
> +#
> +# @features: value of output register, containing the feature bits
> +#
> +# Since: 1.5
> +##
> +{ 'struct': 'X86CPUFeatureWordInfo',
> +  'data': { 'cpuid-input-eax': 'int',
> +'*cpuid-input-ecx': 'int',
> +'cpuid-register': 'X86CPURegister32',
> +'features': 'int' },
> +  'if': 'defined(TARGET_I386)' }
> +
> +##
> +# @DummyForceArrays:
> +#
> +# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
> +#
> +# Since: 2.5
> +##
> +{ 'struct': 'DummyForceArrays',
> +  'data': { 'unused': ['X86CPUFeatureWordInfo'] },
> +  'if': 'defined(TARGET_I386)' }
> +
>  ##
>  # @CpuModelInfo:
>  #
> diff --git a/qapi/machine.json b/qapi/machine.json
> index 6c11e3cf3a..de05730704 100644
> --- a/qapi/machine.json
> +++ b/qapi/machine.json
> @@ -505,48 +505,6 @@
> 'dst': 'uint16',
> 'val': 'uint8' }}
>
> -##
> -# @X86CPURegister32:
> -#
> -# A X86 32-bit register
> -#
> -# Since: 1.5
> -##
> -{ 'enum': 'X86CPURegister32',
> -  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
> -
> -##
> -# @X86CPUFeatureWordInfo:
> -#
> -# Information about a X86 CPU feature word
> -#
> -# @cpuid-input-eax: Input EAX value for CPUID instruction for that
> feature word
> -#
> -# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
> -#   feature word
> -#
> -# @cpuid-register: Output register containing the feature bits
> -#
> -# @features: value of output register, containing the feature bits
> -#
> -# Since: 1.5
> -##
> -{ 'struct': 'X86CPUFeatureWordInfo',
> -  'data': { 'cpuid-input-eax': 'int',
> -'*cpuid-input-ecx': 'int',
> -'cpuid-register': 'X86CPURegister32',
> -'features': 'int' } }
> -
> -##
> -# @DummyForceArrays:
> -#
> -# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
> -#
> -# Since: 2.5
> -##
> -{ 'struct': 'DummyForceArrays',
> -  'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
> -
>  ##
>  # @NumaCpuOptions:
>  #
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index a84553e50c..0753fe4935 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -37,7 +37,7 @@
>  #include "qemu/option.h"
>  #include "qemu/config-file.h"
>  #include "qapi/error.h"
> -#include "qapi/qapi-visit-machine.h"
> +#include "qapi/qapi-visit-machine-target.h"
>  #include "qapi/qapi-visit-run-state.h"
>  #include "qapi/qmp/qdict.h"
>  #include "qapi/qmp/qerror.h"
> diff --git a/target/i386/machine-stub.c b/target/i386/machine-stub.c
> new file mode 100644
> index 00..cb301af057
> --- /dev/null
> +++ b/target/i386/machine-stub.c
> @@ -0,0 +1,22 @@
> +/*
> + * QAPI x86 CPU features stub
> + *
> + * Copyright (c) 2020 Red Hat, Inc.
> + *
> + * Author:
> + *   Philippe Mathieu-Daudé 
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or
> later.
> + * See the COPYING file in the top-level directory.
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qapi/error.h"
> +#include "qapi/qapi-visit-machine-target.h"
> +
> +void visit_type_X86CPUFeatureWordInfoList(Visitor *v, const

[PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

2020-03-15 Thread Philippe Mathieu-Daudé

Move out x86-specific structures from generic machine code.

Acked-by: Richard Henderson 
Signed-off-by: Philippe Mathieu-Daudé 
---
 qapi/machine-target.json   | 45 ++
 qapi/machine.json  | 42 ---
 target/i386/cpu.c  |  2 +-
 target/i386/machine-stub.c | 22 +++
 target/i386/Makefile.objs  |  3 ++-
 5 files changed, 70 insertions(+), 44 deletions(-)
 create mode 100644 target/i386/machine-stub.c

diff --git a/qapi/machine-target.json b/qapi/machine-target.json
index f2c82949d8..fb7a4b7850 100644
--- a/qapi/machine-target.json
+++ b/qapi/machine-target.json
@@ -3,6 +3,51 @@
 # This work is licensed under the terms of the GNU GPL, version 2 or later.
 # See the COPYING file in the top-level directory.
 
+##
+# @X86CPURegister32:
+#
+# A X86 32-bit register
+#
+# Since: 1.5
+##
+{ 'enum': 'X86CPURegister32',
+  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ],
+  'if': 'defined(TARGET_I386)' }
+
+##
+# @X86CPUFeatureWordInfo:
+#
+# Information about a X86 CPU feature word
+#
+# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
+#
+# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
+#   feature word
+#
+# @cpuid-register: Output register containing the feature bits
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 1.5
+##
+{ 'struct': 'X86CPUFeatureWordInfo',
+  'data': { 'cpuid-input-eax': 'int',
+'*cpuid-input-ecx': 'int',
+'cpuid-register': 'X86CPURegister32',
+'features': 'int' },
+  'if': 'defined(TARGET_I386)' }
+
+##
+# @DummyForceArrays:
+#
+# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
+#
+# Since: 2.5
+##
+{ 'struct': 'DummyForceArrays',
+  'data': { 'unused': ['X86CPUFeatureWordInfo'] },
+  'if': 'defined(TARGET_I386)' }
+
 ##
 # @CpuModelInfo:
 #
diff --git a/qapi/machine.json b/qapi/machine.json
index 6c11e3cf3a..de05730704 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -505,48 +505,6 @@
'dst': 'uint16',
'val': 'uint8' }}
 
-##
-# @X86CPURegister32:
-#
-# A X86 32-bit register
-#
-# Since: 1.5
-##
-{ 'enum': 'X86CPURegister32',
-  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
-
-##
-# @X86CPUFeatureWordInfo:
-#
-# Information about a X86 CPU feature word
-#
-# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
-#
-# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
-#   feature word
-#
-# @cpuid-register: Output register containing the feature bits
-#
-# @features: value of output register, containing the feature bits
-#
-# Since: 1.5
-##
-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-'*cpuid-input-ecx': 'int',
-'cpuid-register': 'X86CPURegister32',
-'features': 'int' } }
-
-##
-# @DummyForceArrays:
-#
-# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
-#
-# Since: 2.5
-##
-{ 'struct': 'DummyForceArrays',
-  'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
-
 ##
 # @NumaCpuOptions:
 #
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index a84553e50c..0753fe4935 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -37,7 +37,7 @@
 #include "qemu/option.h"
 #include "qemu/config-file.h"
 #include "qapi/error.h"
-#include "qapi/qapi-visit-machine.h"
+#include "qapi/qapi-visit-machine-target.h"
 #include "qapi/qapi-visit-run-state.h"
 #include "qapi/qmp/qdict.h"
 #include "qapi/qmp/qerror.h"
diff --git a/target/i386/machine-stub.c b/target/i386/machine-stub.c
new file mode 100644
index 00..cb301af057
--- /dev/null
+++ b/target/i386/machine-stub.c
@@ -0,0 +1,22 @@
+/*
+ * QAPI x86 CPU features stub
+ *
+ * Copyright (c) 2020 Red Hat, Inc.
+ *
+ * Author:
+ *   Philippe Mathieu-Daudé 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qapi/qapi-visit-machine-target.h"
+
+void visit_type_X86CPUFeatureWordInfoList(Visitor *v, const char *name,
+  X86CPUFeatureWordInfoList **obj,
+  Error **errp)
+{
+}
diff --git a/target/i386/Makefile.objs b/target/i386/Makefile.objs
index 48e0c28434..1cdfc9f50c 100644
--- a/target/i386/Makefile.objs
+++ b/target/i386/Makefile.objs
@@ -17,6 +17,7 @@ obj-$(CONFIG_HAX) += hax-all.o hax-mem.o hax-posix.o
 endif
 obj-$(CONFIG_HVF) += hvf/
 obj-$(CONFIG_WHPX) += whpx-all.o
-endif
+endif # CONFIG_SOFTMMU
 obj-$(CONFIG_SEV) += sev.o
 obj-$(call lnot,$(CONFIG_SEV)) += sev-stub.o
+obj-$(call lnot,$(CONFIG_SOFTMMU)) += machine-stub.o
-- 
2.21.1

Re: [PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

Re: [PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

Re: [PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

Re: [PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

[PATCH v2 1/8] target/i386: Restrict X86CPUFeatureWord to X86 targets

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