Re: [Qemu-devel] [PATCH v4 08/22] RISC-V TCG Code Generation

2018-02-05 Thread Richard Henderson
On 02/04/2018 10:22 PM, Michael Clark wrote: > TCG code generation for the RV32IMAFDC and RV64IMAFDC. The QEMU > RISC-V code generator has complete coverage for the Base ISA v2.2, > Privileged ISA v1.9.1 and Privileged ISA v1.10: > > - RISC-V Instruction Set Manual Volume I: User-Level ISA

[Qemu-devel] [PATCH v4 08/22] RISC-V TCG Code Generation

2018-02-04 Thread Michael Clark
TCG code generation for the RV32IMAFDC and RV64IMAFDC. The QEMU RISC-V code generator has complete coverage for the Base ISA v2.2, Privileged ISA v1.9.1 and Privileged ISA v1.10: - RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2 - RISC-V Instruction Set Manual Volume II: