Re: [ PATCH v3 05/10] target/riscv: Implement mcountinhibit CSR

On Tue, Oct 26, 2021 at 4:05 AM Atish Patra wrote: > > As per the privilege specification v1.11, mcountinhibit allows to start/stop > a pmu counter selectively. > > Signed-off-by: Atish Patra > --- > target/riscv/cpu.h | 2 ++ > target/riscv/cpu_bits.h | 4 > target/riscv/csr.c

Re: [ PATCH v3 05/10] target/riscv: Implement mcountinhibit CSR

On Tue, Oct 26, 2021 at 6:05 AM Atish Patra wrote: > > As per the privilege specification v1.11, mcountinhibit allows to start/stop > a pmu counter selectively. > > Signed-off-by: Atish Patra Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu.h | 2 ++ >

[ PATCH v3 05/10] target/riscv: Implement mcountinhibit CSR

As per the privilege specification v1.11, mcountinhibit allows to start/stop a pmu counter selectively. Signed-off-by: Atish Patra --- target/riscv/cpu.h | 2 ++ target/riscv/cpu_bits.h | 4 target/riscv/csr.c | 25 + target/riscv/machine.c | 5 +++--