Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-26 Thread Peter Xu
On Mon, Sep 26, 2022 at 11:33:11AM +0200, Igor Mammedov wrote: > On Fri, 23 Sep 2022 21:27:08 -0400 > Peter Xu wrote: > > > On Fri, Sep 23, 2022 at 06:03:44PM -0400, Peter Xu wrote: > > > On Fri, Sep 23, 2022 at 10:41:59AM +0200, Igor Mammedov wrote: > > > > It's worth putting history

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-26 Thread Igor Mammedov
On Fri, 23 Sep 2022 21:27:08 -0400 Peter Xu wrote: > On Fri, Sep 23, 2022 at 06:03:44PM -0400, Peter Xu wrote: > > On Fri, Sep 23, 2022 at 10:41:59AM +0200, Igor Mammedov wrote: > > > It's worth putting history excavation with explanation what is broken and > > > why > > > compat stuff is

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-23 Thread Peter Xu
On Fri, Sep 23, 2022 at 06:03:44PM -0400, Peter Xu wrote: > On Fri, Sep 23, 2022 at 10:41:59AM +0200, Igor Mammedov wrote: > > It's worth putting history excavation with explanation what is broken and > > why > > compat stuff is being ignored in the patch. > > Makes sense, I'll amend the commit

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-23 Thread Peter Xu
On Fri, Sep 23, 2022 at 10:41:59AM +0200, Igor Mammedov wrote: > It's worth putting history excavation with explanation what is broken and why > compat stuff is being ignored in the patch. Makes sense, I'll amend the commit message and repost. Thanks, -- Peter Xu

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-23 Thread Igor Mammedov
On Fri, 23 Sep 2022 10:20:34 +0200 Igor Mammedov wrote: > On Thu, 22 Sep 2022 12:40:01 -0400 > Peter Xu wrote: > > > On Thu, Sep 22, 2022 at 03:46:17PM +0200, Igor Mammedov wrote: > > > On Wed, 21 Sep 2022 12:12:27 -0400 > > > Peter Xu wrote: > > > > > > > It's true that when

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-23 Thread Igor Mammedov
On Thu, 22 Sep 2022 12:40:01 -0400 Peter Xu wrote: > On Thu, Sep 22, 2022 at 03:46:17PM +0200, Igor Mammedov wrote: > > On Wed, 21 Sep 2022 12:12:27 -0400 > > Peter Xu wrote: > > > > > It's true that when vcpus<=255 we don't require the length of 32bit APIC > > > IDs. However here since we

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-22 Thread Peter Xu
On Thu, Sep 22, 2022 at 03:46:17PM +0200, Igor Mammedov wrote: > On Wed, 21 Sep 2022 12:12:27 -0400 > Peter Xu wrote: > > > It's true that when vcpus<=255 we don't require the length of 32bit APIC > > IDs. However here since we already have EIM=ON it means the hypervisor > > will declare the VM

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-22 Thread Peter Xu
On Thu, Sep 22, 2022 at 09:32:54AM +0800, Jason Wang wrote: > > +if (!kvm_enable_x2apic()) { > > +error_setg(errp, "eim=on requires support on the KVM side" > > + "(X2APIC_API, first shipped in v4.7)"); > > +return false; > > +} >

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-22 Thread Igor Mammedov
On Wed, 21 Sep 2022 12:12:27 -0400 Peter Xu wrote: > It's true that when vcpus<=255 we don't require the length of 32bit APIC > IDs. However here since we already have EIM=ON it means the hypervisor > will declare the VM as x2apic supported (e.g. VT-d ECAP register will have > EIM bit 4 set),

Re: [PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-21 Thread Jason Wang
On Thu, Sep 22, 2022 at 12:12 AM Peter Xu wrote: > > It's true that when vcpus<=255 we don't require the length of 32bit APIC > IDs. However here since we already have EIM=ON it means the hypervisor > will declare the VM as x2apic supported (e.g. VT-d ECAP register will have > EIM bit 4 set), so

[PATCH] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks"

2022-09-21 Thread Peter Xu
It's true that when vcpus<=255 we don't require the length of 32bit APIC IDs. However here since we already have EIM=ON it means the hypervisor will declare the VM as x2apic supported (e.g. VT-d ECAP register will have EIM bit 4 set), so the guest should assume the APIC IDs are 32bits width even