On Sat, 13 Aug 2022 at 12:27, Anton Kochkov wrote:
>
> Cortex-M NVIC can be configured with different amount of
> the maximum available priority bits. FreeRTOS has asserts
> that checks if the all unavailable priority bits are unset
> after writing into this register in real hardware.
This
Cortex-M NVIC can be configured with different amount of
the maximum available priority bits. FreeRTOS has asserts
that checks if the all unavailable priority bits are unset
after writing into this register in real hardware.
To allow setting this number depending on the machine or
configuration
