> -Original Message-
> From: Jonathan Cameron
> Sent: Saturday, April 6, 2024 12:46 AM
> To: Jonathan Cameron via
> Cc: Jonathan Cameron ; Yao, Xingtao/姚 幸涛
> ; fan...@samsung.com; Cao, Quanquan/曹 全全
>
> Subject: Re: [PATCH] mem/cxl_type3: fix hpa to dpa logic
nathan Cameron
> > > Sent: Wednesday, March 27, 2024 9:28 PM
> > > To: Yao, Xingtao/姚 幸涛
> > > Cc: fan...@samsung.com; qemu-devel@nongnu.org; Cao, Quanquan/曹 全全
> > >
> > > Subject: Re: [PATCH] mem/cxl_type3: fix hpa to dpa logic
> > >
&g
; Cc: fan...@samsung.com; qemu-devel@nongnu.org; Cao, Quanquan/曹 全全
> >
> > Subject: Re: [PATCH] mem/cxl_type3: fix hpa to dpa logic
> >
> > On Tue, 26 Mar 2024 21:46:53 -0400
> > Yao Xingtao wrote:
> >
> > > In 3, 6, 12 interleave ways, we could n
Jonathan
thanks for your reply!
> -Original Message-
> From: Jonathan Cameron
> Sent: Wednesday, March 27, 2024 9:28 PM
> To: Yao, Xingtao/姚 幸涛
> Cc: fan...@samsung.com; qemu-devel@nongnu.org; Cao, Quanquan/曹 全全
>
> Subject: Re: [PATCH] mem/cxl_type3: fix hpa to
On Tue, 26 Mar 2024 21:46:53 -0400
Yao Xingtao wrote:
> In 3, 6, 12 interleave ways, we could not access cxl memory properly,
> and when the process is running on it, a 'segmentation fault' error will
> occur.
>
> According to the CXL specification '8.2.4.20.13 Decoder Protection',
> there are
In 3, 6, 12 interleave ways, we could not access cxl memory properly,
and when the process is running on it, a 'segmentation fault' error will
occur.
According to the CXL specification '8.2.4.20.13 Decoder Protection',
there are two branches to convert HPA to DPA:
b1: Decoder[m].IW < 8 (for 1, 2,
