Re: [PATCH-for-8.0 3/7] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterField API

2022-12-19 Thread Richard Henderson
On 12/9/22 07:15, Philippe Mathieu-Daudé wrote: /* CPU Configuration */ -#if TARGET_BIG_ENDIAN s->regs[GT_CPU] = 0x; -#else -s->regs[GT_CPU] = 0x1000; -#endif +s->regs[GT_CPU] = FIELD_DP32(s->regs[GT_CPU], GT_CPU, Endianess, cpu_le); Missing

[PATCH-for-8.0 3/7] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterField API

2022-12-09 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/gt64xxx_pci.c | 37 + 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 1b9ac7f792..8c9ec80f7c 100644 --- a/hw/mips/gt64xxx_pci.c +++