On 8/11/22 10:16, Peter Maydell wrote:
+static void mdcr_el2_write(CPUARMState *env, const ARMCPRegInfo *ri,
+ uint64_t value)
+{
+/*
+ * Some MDCR_EL3 bits affect whether PMU counters are running:
Typo el3.
Otherwise,
Reviewed-by: Richard Henderson
r~
+
The PMU cycle and event counter infrastructure design requires that
operations on the PMU register fields are wrapped in pmu_op_start()
and pmu_op_finish() calls (or their more specific pmmcntr and
pmevcntr equivalents). This includes any changes to registers which
affect whether the counter
