Re: [PATCH 10/13] target/mips: Let raise_mmu_exception() take MMUAccessType argument

[Jiaxun Yang]

在 2021/1/28 下午10:41, Philippe Mathieu-Daudé 写道:

Both mips_cpu_tlb_fill() and cpu_mips_translate_address() pass
MMUAccessType to raise_mmu_exception(). Let the prototype use it
as argument, as it is stricter than an integer.

Signed-off-by: Philippe Mathieu-Daudé 


Reviewed-by: Jiaxun Yang 


---
  target/mips/tlb_helper.c | 10 +-
  1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c
index e9c3adeade6..21b7d38f11c 100644
--- a/target/mips/tlb_helper.c
+++ b/target/mips/tlb_helper.c
@@ -405,12 +405,12 @@ void cpu_mips_tlb_flush(CPUMIPSState *env)
  #endif /* !CONFIG_USER_ONLY */
  
  static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,

-int rw, int tlb_error)
+MMUAccessType access_type, int tlb_error)
  {
  CPUState *cs = env_cpu(env);
  int exception = 0, error_code = 0;
  
-if (rw == MMU_INST_FETCH) {

+if (access_type == MMU_INST_FETCH) {
  error_code |= EXCP_INST_NOTAVAIL;
  }
  
@@ -419,7 +419,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,

  case TLBRET_BADADDR:
  /* Reference to kernel address from user mode or supervisor mode */
  /* Reference to supervisor address from user mode */
-if (rw == MMU_DATA_STORE) {
+if (access_type == MMU_DATA_STORE) {
  exception = EXCP_AdES;
  } else {
  exception = EXCP_AdEL;
@@ -427,7 +427,7 @@ static void raise_mmu_exception(CPUMIPSState *env, 
target_ulong address,
  break;
  case TLBRET_NOMATCH:
  /* No TLB match for a mapped address */
-if (rw == MMU_DATA_STORE) {
+if (access_type == MMU_DATA_STORE) {
  exception = EXCP_TLBS;
  } else {
  exception = EXCP_TLBL;
@@ -436,7 +436,7 @@ static void raise_mmu_exception(CPUMIPSState *env, 
target_ulong address,
  break;
  case TLBRET_INVALID:
  /* TLB match with no valid bit */
-if (rw == MMU_DATA_STORE) {
+if (access_type == MMU_DATA_STORE) {
  exception = EXCP_TLBS;
  } else {
  exception = EXCP_TLBL;

[PATCH 10/13] target/mips: Let raise_mmu_exception() take MMUAccessType argument

[Philippe Mathieu-Daudé]

Both mips_cpu_tlb_fill() and cpu_mips_translate_address() pass
MMUAccessType to raise_mmu_exception(). Let the prototype use it
as argument, as it is stricter than an integer.

Signed-off-by: Philippe Mathieu-Daudé 
---
 target/mips/tlb_helper.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c
index e9c3adeade6..21b7d38f11c 100644
--- a/target/mips/tlb_helper.c
+++ b/target/mips/tlb_helper.c
@@ -405,12 +405,12 @@ void cpu_mips_tlb_flush(CPUMIPSState *env)
 #endif /* !CONFIG_USER_ONLY */
 
 static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
-int rw, int tlb_error)
+MMUAccessType access_type, int tlb_error)
 {
 CPUState *cs = env_cpu(env);
 int exception = 0, error_code = 0;
 
-if (rw == MMU_INST_FETCH) {
+if (access_type == MMU_INST_FETCH) {
 error_code |= EXCP_INST_NOTAVAIL;
 }
 
@@ -419,7 +419,7 @@ static void raise_mmu_exception(CPUMIPSState *env, 
target_ulong address,
 case TLBRET_BADADDR:
 /* Reference to kernel address from user mode or supervisor mode */
 /* Reference to supervisor address from user mode */
-if (rw == MMU_DATA_STORE) {
+if (access_type == MMU_DATA_STORE) {
 exception = EXCP_AdES;
 } else {
 exception = EXCP_AdEL;
@@ -427,7 +427,7 @@ static void raise_mmu_exception(CPUMIPSState *env, 
target_ulong address,
 break;
 case TLBRET_NOMATCH:
 /* No TLB match for a mapped address */
-if (rw == MMU_DATA_STORE) {
+if (access_type == MMU_DATA_STORE) {
 exception = EXCP_TLBS;
 } else {
 exception = EXCP_TLBL;
@@ -436,7 +436,7 @@ static void raise_mmu_exception(CPUMIPSState *env, 
target_ulong address,
 break;
 case TLBRET_INVALID:
 /* TLB match with no valid bit */
-if (rw == MMU_DATA_STORE) {
+if (access_type == MMU_DATA_STORE) {
 exception = EXCP_TLBS;
 } else {
 exception = EXCP_TLBL;
-- 
2.26.2