It prepares ground for the AST2600.
Signed-off-by: Cédric Le Goater
---
include/hw/arm/aspeed_soc.h | 9 +--
hw/arm/aspeed.c | 4 +-
hw/arm/aspeed_soc.c | 148 +++-
3 files changed, 84 insertions(+), 77 deletions(-)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index b427f2668a8a..667dfec0f7b6 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -57,7 +57,9 @@ typedef struct AspeedSoCState {
#define TYPE_ASPEED_SOC "aspeed-soc"
#define ASPEED_SOC(obj) OBJECT_CHECK(AspeedSoCState, (obj), TYPE_ASPEED_SOC)
-typedef struct AspeedSoCInfo {
+typedef struct AspeedSoCClass {
+DeviceClass parent_class;
+
const char *name;
const char *cpu_type;
uint32_t silicon_rev;
@@ -67,11 +69,6 @@ typedef struct AspeedSoCInfo {
const int *irqmap;
const hwaddr *memmap;
uint32_t num_cpus;
-} AspeedSoCInfo;
-
-typedef struct AspeedSoCClass {
-DeviceClass parent_class;
-AspeedSoCInfo *info;
} AspeedSoCClass;
#define ASPEED_SOC_CLASS(klass) \
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 30e280484262..52993f84b461 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -215,7 +215,7 @@ static void aspeed_board_init(MachineState *machine,
memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram);
memory_region_add_subregion(get_system_memory(),
-sc->info->memmap[ASPEED_SDRAM],
+sc->memmap[ASPEED_SDRAM],
&bmc->ram_container);
max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size",
@@ -246,7 +246,7 @@ static void aspeed_board_init(MachineState *machine,
}
aspeed_board_binfo.ram_size = ram_size;
-aspeed_board_binfo.loader_start = sc->info->memmap[ASPEED_SDRAM];
+aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM];
aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus;
if (cfg->i2c_init) {
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index e60f198d92c1..a063be9fd795 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -115,35 +115,11 @@ static const int aspeed_soc_ast2400_irqmap[] = {
#define aspeed_soc_ast2500_irqmap aspeed_soc_ast2400_irqmap
-static const AspeedSoCInfo aspeed_socs[] = {
-{
-.name = "ast2400-a1",
-.cpu_type = ARM_CPU_TYPE_NAME("arm926"),
-.silicon_rev = AST2400_A1_SILICON_REV,
-.sram_size= 0x8000,
-.spis_num = 1,
-.wdts_num = 2,
-.irqmap = aspeed_soc_ast2400_irqmap,
-.memmap = aspeed_soc_ast2400_memmap,
-.num_cpus = 1,
-}, {
-.name = "ast2500-a1",
-.cpu_type = ARM_CPU_TYPE_NAME("arm1176"),
-.silicon_rev = AST2500_A1_SILICON_REV,
-.sram_size= 0x9000,
-.spis_num = 2,
-.wdts_num = 3,
-.irqmap = aspeed_soc_ast2500_irqmap,
-.memmap = aspeed_soc_ast2500_memmap,
-.num_cpus = 1,
-},
-};
-
static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
{
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
-return qdev_get_gpio_in(DEVICE(&s->vic), sc->info->irqmap[ctrl]);
+return qdev_get_gpio_in(DEVICE(&s->vic), sc->irqmap[ctrl]);
}
static void aspeed_soc_init(Object *obj)
@@ -154,13 +130,13 @@ static void aspeed_soc_init(Object *obj)
char socname[8];
char typename[64];
-if (sscanf(sc->info->name, "%7s", socname) != 1) {
+if (sscanf(sc->name, "%7s", socname) != 1) {
g_assert_not_reached();
}
-for (i = 0; i < sc->info->num_cpus; i++) {
+for (i = 0; i < sc->num_cpus; i++) {
object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]),
-sizeof(s->cpu[i]), sc->info->cpu_type,
+sizeof(s->cpu[i]), sc->cpu_type,
&error_abort, NULL);
}
@@ -168,7 +144,7 @@ static void aspeed_soc_init(Object *obj)
sysbus_init_child_obj(obj, "scu", OBJECT(&s->scu), sizeof(s->scu),
typename);
qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev",
- sc->info->silicon_rev);
+ sc->silicon_rev);
object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu),
"hw-strap1", &error_abort);
object_property_add_alias(obj, "hw-strap2", OBJECT(&s->scu),
@@ -200,7 +176,7 @@ static void aspeed_soc_init(Object *obj)
object_property_add_alias(obj, "dram", OBJECT(&s->fmc), "dram",
&error_abort);
-for (i = 0; i < sc->info->spis_num; i++) {
+for (i = 0; i < sc->spis_num; i++) {
snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1
