On Fri, Nov 27, 2020 at 10:51:26PM +, Peter Maydell wrote:
> We're about to refactor the OpenRISC pic_cpu code in a way that means
> that just grabbing the whole qemu_irq[] array of inbound IRQs for a
> CPU won't be possible any more. Abstract out a function for "return
> the qemu_irq for IRQ x input of CPU y" so we can more easily replace
> the implementation.
>
> Signed-off-by: Peter Maydell
> ---
> hw/openrisc/openrisc_sim.c | 38 +-
> 1 file changed, 21 insertions(+), 17 deletions(-)
>
> diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> index a8adf6b70d7..75ba0f47444 100644
> --- a/hw/openrisc/openrisc_sim.c
> +++ b/hw/openrisc/openrisc_sim.c
> @@ -52,8 +52,13 @@ static void main_cpu_reset(void *opaque)
> cpu_set_pc(cs, boot_info.bootstrap_pc);
> }
>
> +static qemu_irq get_cpu_irq(OpenRISCCPU *cpus[], int cpunum, int irq_pin)
> +{
> +return cpus[cpunum]->env.irq[irq_pin];
> +}
> +
> static void openrisc_sim_net_init(hwaddr base, hwaddr descriptors,
> - int num_cpus, qemu_irq **cpu_irqs,
> + int num_cpus, OpenRISCCPU *cpus[],
>int irq_pin, NICInfo *nd)
> {
> DeviceState *dev;
> @@ -70,18 +75,18 @@ static void openrisc_sim_net_init(hwaddr base, hwaddr
> descriptors,
> qdev_prop_set_uint32(splitter, "num-lines", num_cpus);
> qdev_realize_and_unref(splitter, NULL, _fatal);
> for (i = 0; i < num_cpus; i++) {
> -qdev_connect_gpio_out(splitter, i, cpu_irqs[i][irq_pin]);
> +qdev_connect_gpio_out(splitter, i, get_cpu_irq(cpus, i,
> irq_pin));
> }
> sysbus_connect_irq(s, 0, qdev_get_gpio_in(splitter, 0));
> } else {
> -sysbus_connect_irq(s, 0, cpu_irqs[0][irq_pin]);
> +sysbus_connect_irq(s, 0, get_cpu_irq(cpus, 0, irq_pin));
> }
> sysbus_mmio_map(s, 0, base);
> sysbus_mmio_map(s, 1, descriptors);
> }
>
> static void openrisc_sim_ompic_init(hwaddr base, int num_cpus,
> -qemu_irq **cpu_irqs, int irq_pin)
> +OpenRISCCPU *cpus[], int irq_pin)
> {
> DeviceState *dev;
> SysBusDevice *s;
> @@ -93,7 +98,7 @@ static void openrisc_sim_ompic_init(hwaddr base, int
> num_cpus,
> s = SYS_BUS_DEVICE(dev);
> sysbus_realize_and_unref(s, _fatal);
> for (i = 0; i < num_cpus; i++) {
> -sysbus_connect_irq(s, i, cpu_irqs[i][irq_pin]);
> +sysbus_connect_irq(s, i, get_cpu_irq(cpus, i, irq_pin));
> }
> sysbus_mmio_map(s, 0, base);
> }
> @@ -136,26 +141,24 @@ static void openrisc_sim_init(MachineState *machine)
> {
> ram_addr_t ram_size = machine->ram_size;
> const char *kernel_filename = machine->kernel_filename;
> -OpenRISCCPU *cpu = NULL;
> +OpenRISCCPU *cpus[2] = {};
> MemoryRegion *ram;
> -qemu_irq *cpu_irqs[2];
> qemu_irq serial_irq;
> int n;
> unsigned int smp_cpus = machine->smp.cpus;
>
> assert(smp_cpus >= 1 && smp_cpus <= 2);
> for (n = 0; n < smp_cpus; n++) {
> -cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
> -if (cpu == NULL) {
> +cpus[n] = OPENRISC_CPU(cpu_create(machine->cpu_type));
> +if (cpus[n] == NULL) {
> fprintf(stderr, "Unable to find CPU definition!\n");
> exit(1);
> }
> -cpu_openrisc_pic_init(cpu);
> -cpu_irqs[n] = (qemu_irq *) cpu->env.irq;
> +cpu_openrisc_pic_init(cpus[n]);
>
> -cpu_openrisc_clock_init(cpu);
> +cpu_openrisc_clock_init(cpus[n]);
>
> -qemu_register_reset(main_cpu_reset, cpu);
> +qemu_register_reset(main_cpu_reset, cpus[n]);
> }
>
> ram = g_malloc(sizeof(*ram));
> @@ -164,15 +167,16 @@ static void openrisc_sim_init(MachineState *machine)
>
> if (nd_table[0].used) {
> openrisc_sim_net_init(0x9200, 0x92000400, smp_cpus,
> - cpu_irqs, 4, nd_table);
> + cpus, 4, nd_table);
> }
>
> if (smp_cpus > 1) {
> -openrisc_sim_ompic_init(0x9800, smp_cpus, cpu_irqs, 1);
> +openrisc_sim_ompic_init(0x9800, smp_cpus, cpus, 1);
>
> -serial_irq = qemu_irq_split(cpu_irqs[0][2], cpu_irqs[1][2]);
> +serial_irq = qemu_irq_split(get_cpu_irq(cpus, 0, 2),
> +get_cpu_irq(cpus, 1, 2));
> } else {
> -serial_irq = cpu_irqs[0][2];
> +serial_irq = get_cpu_irq(cpus, 0, 2);
> }
>
> serial_mm_init(get_system_memory(), 0x9000, 0, serial_irq,
> --
> 2.20.1
This looks good to me.
Reviewed-by: Stafford Horne
Again, if there is no problem please feel free to merge.
