Re: [PATCH 5/6] aspeed/smc: Let the SSI core layer define the bus name
On Mon, Mar 7, 2022 at 5:34 PM Cédric Le Goater wrote: > > If no id is provided, qdev automatically assigns a unique ename with > the following pattern ".". > > Signed-off-by: Cédric Le Goater Reviewed-by: Alistair Francis Alistair > --- > hw/ssi/aspeed_smc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c > index f194182beacf..113f31899a6b 100644 > --- a/hw/ssi/aspeed_smc.c > +++ b/hw/ssi/aspeed_smc.c > @@ -1130,7 +1130,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error > **errp) > /* DMA irq. Keep it first for the initialization in the SoC */ > sysbus_init_irq(sbd, >irq); > > -s->spi = ssi_create_bus(dev, "spi"); > +s->spi = ssi_create_bus(dev, NULL); > > /* Setup cs_lines for peripherals */ > s->cs_lines = g_new0(qemu_irq, asc->max_cs); > -- > 2.34.1 > >
Re: [PATCH 5/6] aspeed/smc: Let the SSI core layer define the bus name
On 7/3/22 08:18, Cédric Le Goater wrote: If no id is provided, qdev automatically assigns a unique ename with "an unique name"? the following pattern ".". Maybe complete with smth like: "which avoid bus name collision when using multiple buses." Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Cédric Le Goater --- hw/ssi/aspeed_smc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Re: [PATCH 5/6] aspeed/smc: Let the SSI core layer define the bus name
On 3/7/22 11:25, Philippe Mathieu-Daudé wrote: On 7/3/22 08:18, Cédric Le Goater wrote: If no id is provided, qdev automatically assigns a unique ename with "an unique name"? the following pattern ".". Maybe complete with smth like: "which avoid bus name collision when using multiple buses." sure. will do. The goal behind this patch is to start experimenting with user created "m25p80" devices such : -drive file=,format=raw,id=drive0 -device mx66l1g45g,bus=ssi.0,drive=drive0 BMC machines are starting to duplicate and I think, at least for Aspeed, that we should offer a bare machine per SoC and let the user define the I2C topology on the command line. The other aspect to cover is the definition of the flash devices (possibly 3 controllers * 2-3 CS). Adding a cs= or and addr= is the next step. Thanks, C.
[PATCH 5/6] aspeed/smc: Let the SSI core layer define the bus name
If no id is provided, qdev automatically assigns a unique ename with the following pattern ".". Signed-off-by: Cédric Le Goater --- hw/ssi/aspeed_smc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index f194182beacf..113f31899a6b 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -1130,7 +1130,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp) /* DMA irq. Keep it first for the initialization in the SoC */ sysbus_init_irq(sbd, >irq); -s->spi = ssi_create_bus(dev, "spi"); +s->spi = ssi_create_bus(dev, NULL); /* Setup cs_lines for peripherals */ s->cs_lines = g_new0(qemu_irq, asc->max_cs); -- 2.34.1
