Add a couple of tracing events for internal driver updates Signed-off-by: Ben Dooks <ben.do...@sifive.com> --- hw/pci-host/designware.c | 4 ++++ hw/pci-host/trace-events | 4 ++++ 2 files changed, 8 insertions(+)
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index a47ae48071..489959513f 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -30,6 +30,7 @@ #include "migration/vmstate.h" #include "hw/irq.h" #include "hw/pci-host/designware.h" +#include "trace.h" #define DESIGNWARE_PCIE_PORT_LINK_CONTROL 0x710 #define DESIGNWARE_PCIE_PHY_DEBUG_R1 0x72C @@ -112,6 +113,7 @@ static void designware_pcie_root_update_msi_mapping(DesignwarePCIERoot *root) const uint64_t base = root->msi.base; const bool enable = root->msi.intr[0].enable; + trace_dw_pcie_msi_update(base, enable); memory_region_set_address(mem, base); memory_region_set_enabled(mem, enable); } @@ -279,6 +281,8 @@ static void designware_pcie_update_viewport(DesignwarePCIERoot *root, uint32_t cr0 = viewport->cr[0]; MemoryRegion *current, *other; + trace_dw_pcie_viewport_update(target, base, size, cr0, enabled); + if ((cr0 & 0xFF) == DESIGNWARE_PCIE_ATU_TYPE_MEM) { current = &viewport->mem; other = &viewport->cfg; diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index 437e66ff50..6b064d3c74 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -3,6 +3,10 @@ # bonito.c bonito_spciconf_small_access(uint64_t addr, unsigned size) "PCI config address is smaller then 32-bit, addr: 0x%"PRIx64", size: %u" +# designware.c +dw_pcie_msi_update(uint64_t base, int enable) "base 0x%" PRIx64 " enable %d" +dw_pcie_viewport_update(uint64_t target, uint64_t base, uint64_t limit, uint32_t cr0, int enabled) "target 0x%" PRIx64 " base 0x%" PRIx64 " limit 0x%" PRIx64 " cr0 0x%" PRIx32 " enabled %d" + # grackle.c grackle_set_irq(int irq_num, int level) "set_irq num %d level %d" -- 2.35.1