On 10/14/20 7:56 PM, Ben Widawsky wrote:
On 20-10-14 13:52:29, Michael S. Tsirkin wrote:
On Wed, Oct 14, 2020 at 10:18:53AM -0700, Ben Widawsky wrote:
This patch informs future developers working on root complexes, root
ports, or bridges that also wish to implement a BAR for those. PCI type
1
On 20-10-14 13:52:29, Michael S. Tsirkin wrote:
> On Wed, Oct 14, 2020 at 10:18:53AM -0700, Ben Widawsky wrote:
> > This patch informs future developers working on root complexes, root
> > ports, or bridges that also wish to implement a BAR for those. PCI type
> > 1 headers only support 2 base
On Wed, Oct 14, 2020 at 10:18:53AM -0700, Ben Widawsky wrote:
> This patch informs future developers working on root complexes, root
> ports, or bridges that also wish to implement a BAR for those. PCI type
> 1 headers only support 2 base address registers. It is incorrect and
> difficult to
This patch informs future developers working on root complexes, root
ports, or bridges that also wish to implement a BAR for those. PCI type
1 headers only support 2 base address registers. It is incorrect and
difficult to figure out what is wrong with the device when this mistake
is made. With