Hi,
This series fix some bugs find from RISU test.
v2:
-remove patch5 div if x/0 set dividend to 0.
Song Gao (4):
target/loongarch: ftint_xxx insns set the result high 32bit 0xffffffff
target/loongarch: bstrins.w need set dest register EXT_SIGN
target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags
target/loongarch: flogb_{s/d} add set float_flag_divbyzero
target/loongarch/fpu_helper.c | 32 +++++++++++++------
target/loongarch/insn_trans/trans_bit.c.inc | 4 +--
.../loongarch/insn_trans/trans_farith.c.inc | 12 +++----
3 files changed, 31 insertions(+), 17 deletions(-)
--
2.31.1
