On 1/7/21 5:42 AM, Peter Maydell wrote:
>> +/* Memory operations require alignment: SCTLR_ELx.A or CCR.UNALIGN_TRP */
>> +FIELD(TBFLAG_ANY, ALIGN_MEM, 19, 1)
>
> This is trying to use the same bit as TBFLAG_A64 MTE0_ACTIVE...
> We might have to finally start in on using bits in cs_base.
Oops.
On Tue, 8 Dec 2020 at 18:01, Richard Henderson
wrote:
>
> Use this to signal when memory access alignment is required.
> This value comes from the CCR register for M-profile, and
> from the SCTLR register for A-profile.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h | 20
Use this to signal when memory access alignment is required.
This value comes from the CCR register for M-profile, and
from the SCTLR register for A-profile.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 20 +++-
target/arm/translate.h | 2 ++
