Re: [PATCH v2 1/2] accel/tcg: Add tlb_flush_page_bits_by_mmuidx*

2020-10-16 Thread Peter Maydell
On Fri, 16 Oct 2020 at 22:07, Richard Henderson wrote: > > On ARM, the Top Byte Ignore feature means that only 56 bits of > the address are significant in the virtual address. We are > required to give the entire 64-bit address to FAR_ELx on fault, > which means that we do not "clean" the top

[PATCH v2 1/2] accel/tcg: Add tlb_flush_page_bits_by_mmuidx*

2020-10-16 Thread Richard Henderson
On ARM, the Top Byte Ignore feature means that only 56 bits of the address are significant in the virtual address. We are required to give the entire 64-bit address to FAR_ELx on fault, which means that we do not "clean" the top byte early in TCG. This new interface allows us to flush all 256