Re: [PATCH v2 1/2] hw/misc: Implementating dummy AST2600 I3C model

2022-01-11 Thread Cédric Le Goater
Hello Troy, + +memory_region_init_io(>iomem, OBJECT(s), _i3c_ops, s, +TYPE_ASPEED_I3C, ASPEED_I3C_NR_REGS << 2); + +sysbus_init_mmio(sbd, >iomem); I would add a container region containing all the regions : memory_region_init(>iomem_container, OBJECT(s),

Re: [PATCH v2 1/2] hw/misc: Implementating dummy AST2600 I3C model

2022-01-10 Thread Troy Lee
Hi Cedric, On Mon, Jan 10, 2022 at 10:25 PM Cédric Le Goater wrote: > > Hello Troy, > > On 1/10/22 08:21, Troy Lee wrote: > > Introduce a dummy AST2600 I3C model. > > > > Aspeed 2600 SDK enables I3C support by default. The I3C driver will try > > to reset the device controller and setup through

Re: [PATCH v2 1/2] hw/misc: Implementating dummy AST2600 I3C model

2022-01-10 Thread Cédric Le Goater
Hello Troy, On 1/10/22 08:21, Troy Lee wrote: Introduce a dummy AST2600 I3C model. Aspeed 2600 SDK enables I3C support by default. The I3C driver will try to reset the device controller and setup through device address table register. This dummy model response these register with default

[PATCH v2 1/2] hw/misc: Implementating dummy AST2600 I3C model

2022-01-09 Thread Troy Lee
Introduce a dummy AST2600 I3C model. Aspeed 2600 SDK enables I3C support by default. The I3C driver will try to reset the device controller and setup through device address table register. This dummy model response these register with default value listed on ast2600v10 datasheet chapter 54.2.