Hi, Richard.
On 07/28/2021 12:12 AM, Richard Henderson wrote:
> On 7/26/21 9:17 PM, Song Gao wrote:
>>> I think this should be as simple as
>>>
>>> gen_helper_fp_add_s(cpu_fpu[a->fd], cpu_env,
>>> cpu_fpu[a->fj], cpu_fpu[a->fk]);
>>>
>>> I also think that loongarch
On 7/26/21 9:17 PM, Song Gao wrote:
I think this should be as simple as
gen_helper_fp_add_s(cpu_fpu[a->fd], cpu_env,
cpu_fpu[a->fj], cpu_fpu[a->fk]);
I also think that loongarch should learn from risc-v and change the architecture to
"nan-box" single-precision
Hi, Richard.
On 07/23/2021 01:44 PM, Richard Henderson wrote:
> On 7/20/21 11:53 PM, Song Gao wrote:
>> +uint64_t helper_fp_sqrt_d(CPULoongArchState *env, uint64_t fp)
>> +{
>> + fp = float64_sqrt(fp, >active_fpu.fp_status);
>> + update_fcsr0(env, GETPC());
>> + return fp;
>> +}
>> +
>>
On 7/20/21 11:53 PM, Song Gao wrote:
+uint64_t helper_fp_sqrt_d(CPULoongArchState *env, uint64_t fp)
+{
+fp = float64_sqrt(fp, >active_fpu.fp_status);
+update_fcsr0(env, GETPC());
+return fp;
+}
+
+uint32_t helper_fp_sqrt_s(CPULoongArchState *env, uint32_t fp)
+{
+fp =
This patch implement floating point arithmetic instruction translation.
This includes:
- F{ADD/SUB/MUL/DIV}.{S/D}
- F{MADD/MSUB/NMADD/NMSUB}.{S/D}
- F{MAX/MIN}.{S/D}
- F{MAXA/MINA}.{S/D}
- F{ABS/NEG}.{S/D}
- F{SQRT/RECIP/RSQRT}.{S/D}
- F{SCALEB/LOGB/COPYSIGN}.{S/D}
- FCLASS.{S/D}
Signed-off-by:
