Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions

2019-12-06 Thread Richard Henderson
On 12/6/19 6:08 AM, Peter Maydell wrote: >> DEF_HELPER_FLAGS_3(autdb, TCG_CALL_NO_WG, i64, env, i64, i64) >> DEF_HELPER_FLAGS_2(xpaci, TCG_CALL_NO_RWG_SE, i64, env, i64) >> DEF_HELPER_FLAGS_2(xpacd, TCG_CALL_NO_RWG_SE, i64, env, i64) >> + >> +DEF_HELPER_3(check_hcr_el2_trap, void, env, i32,

Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions

2019-12-06 Thread Marc Zyngier
On 2019-12-06 14:08, Peter Maydell wrote: On Sun, 1 Dec 2019 at 12:20, Marc Zyngier wrote: HCR_EL2.TID3 requires that AArch32 reads of MVFR[012] are trapped to EL2, and HCR_EL2.TID0 does the same for reads of FPSID. In order to handle this, introduce a new TCG helper function that checks for

Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions

2019-12-06 Thread Peter Maydell
On Sun, 1 Dec 2019 at 12:20, Marc Zyngier wrote: > > HCR_EL2.TID3 requires that AArch32 reads of MVFR[012] are trapped to > EL2, and HCR_EL2.TID0 does the same for reads of FPSID. > In order to handle this, introduce a new TCG helper function that > checks for these control bits before executing

Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions

2019-12-02 Thread Marc Zyngier
On 2019-12-02 16:56, Richard Henderson wrote: On 12/2/19 4:45 PM, Marc Zyngier wrote: Annoying that there's a bug in the manual -- FPSID is listed as group 0 in plenty of places, except in the pseudo-code for Accessing the FPSID which uses TID3. Are you sure? I'm looking at DDI0487E_a, ...

Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions

2019-12-02 Thread Richard Henderson
On 12/2/19 4:45 PM, Marc Zyngier wrote: >> Annoying that there's a bug in the manual -- FPSID is listed as group 0 in >> plenty of places, except in the pseudo-code for Accessing the FPSID >> which uses TID3. > > Are you sure? I'm looking at DDI0487E_a, ... > Or have you spotted a discrepancy >

Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions

2019-12-02 Thread Marc Zyngier
On 2019-12-02 15:35, Richard Henderson wrote: On 12/1/19 12:20 PM, Marc Zyngier wrote: HCR_EL2.TID3 requires that AArch32 reads of MVFR[012] are trapped to EL2, and HCR_EL2.TID0 does the same for reads of FPSID. In order to handle this, introduce a new TCG helper function that checks for these

Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions

2019-12-02 Thread Richard Henderson
On 12/1/19 12:20 PM, Marc Zyngier wrote: > HCR_EL2.TID3 requires that AArch32 reads of MVFR[012] are trapped to > EL2, and HCR_EL2.TID0 does the same for reads of FPSID. > In order to handle this, introduce a new TCG helper function that > checks for these control bits before executing the VMRC

[PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions

2019-12-01 Thread Marc Zyngier
HCR_EL2.TID3 requires that AArch32 reads of MVFR[012] are trapped to EL2, and HCR_EL2.TID0 does the same for reads of FPSID. In order to handle this, introduce a new TCG helper function that checks for these control bits before executing the VMRC instruction. Tested with a hacked-up version of