Re: [PATCH v2 5/5] hw/nvram/eeprom_at24c: Make reset behavior more like hardware

2023-01-17 Thread Peter Delevoryas
On Tue, Jan 17, 2023 at 08:42:46AM +0100, Cédric Le Goater wrote: > On 1/17/23 00:56, Peter Delevoryas wrote: > > EEPROM's are a form of non-volatile memory. After power-cycling an EEPROM, > > I would expect the I2C state machine to be reset to default values, but I > > wouldn't really expect the

Re: [PATCH v2 5/5] hw/nvram/eeprom_at24c: Make reset behavior more like hardware

2023-01-16 Thread Cédric Le Goater
On 1/17/23 00:56, Peter Delevoryas wrote: EEPROM's are a form of non-volatile memory. After power-cycling an EEPROM, I would expect the I2C state machine to be reset to default values, but I wouldn't really expect the memory to change at all. The current implementation of the at24c EEPROM

[PATCH v2 5/5] hw/nvram/eeprom_at24c: Make reset behavior more like hardware

2023-01-16 Thread Peter Delevoryas
EEPROM's are a form of non-volatile memory. After power-cycling an EEPROM, I would expect the I2C state machine to be reset to default values, but I wouldn't really expect the memory to change at all. The current implementation of the at24c EEPROM resets its internal memory on reset. This matches