Re: [PATCH v3 0/2] Enhance maximum priority support of PLIC

On Mon, Oct 3, 2022 at 2:18 PM Jim Shu wrote: > > This patchset fixes hard-coded maximum priority of interrupt priority > register and also changes this register to WARL field to align the PLIC > spec. > > Changelog: > > v3: > * fix opposite of power-of-2 max priority checking expression. > >

Re: [PATCH v3 0/2] Enhance maximum priority support of PLIC

Gentle ping. It's a patch for fix and spec alignment of PLIC. On Mon, Oct 3, 2022 at 12:14 PM Jim Shu wrote: > > This patchset fixes hard-coded maximum priority of interrupt priority > register and also changes this register to WARL field to align the PLIC > spec. > > Changelog: > > v3: > *

[PATCH v3 0/2] Enhance maximum priority support of PLIC

This patchset fixes hard-coded maximum priority of interrupt priority register and also changes this register to WARL field to align the PLIC spec. Changelog: v3: * fix opposite of power-of-2 max priority checking expression. v2: * change interrupt priority register to WARL field. Jim Shu