Re: [PATCH v3 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro

2020-12-02 Thread Philippe Mathieu-Daudé
On 12/2/20 12:15 AM, Richard Henderson wrote: > On 12/1/20 1:28 PM, Philippe Mathieu-Daudé wrote: >> ISA features are usually denoted in read-only bits from >> CPU registers. Add the GET_FEATURE_REG_EQU() macro which >> checks if a CPU register has bits set to a specific value. >> >> Use the macro

Re: [PATCH v3 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro

2020-12-01 Thread Richard Henderson
On 12/1/20 1:28 PM, Philippe Mathieu-Daudé wrote: > ISA features are usually denoted in read-only bits from > CPU registers. Add the GET_FEATURE_REG_EQU() macro which > checks if a CPU register has bits set to a specific value. > > Use the macro to check the 'Architecture Revision' level > of the

[PATCH v3 4/6] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro

2020-12-01 Thread Philippe Mathieu-Daudé
ISA features are usually denoted in read-only bits from CPU registers. Add the GET_FEATURE_REG_EQU() macro which checks if a CPU register has bits set to a specific value. Use the macro to check the 'Architecture Revision' level of the Config0 register, which is '2' when the Release 6 ISA is