Re: [PATCH v4 08/12] hw/nvram: NPCM7xx OTP device model

2020-07-08 Thread Havard Skinnemoen
On Wed, Jul 8, 2020 at 1:54 AM Philippe Mathieu-Daudé wrote: > > On 7/7/20 8:47 PM, Havard Skinnemoen wrote: > > +value = tswap32(nc->disabled_modules); > > +npcm7xx_otp_array_write(&s->fuse_array, &value, 64, sizeof(value)); > > What is magic offset 64 for? Good point. I'll add some defi

Re: [PATCH v4 08/12] hw/nvram: NPCM7xx OTP device model

2020-07-08 Thread Philippe Mathieu-Daudé
On 7/7/20 8:47 PM, Havard Skinnemoen wrote: > This supports reading and writing OTP fuses and keys. Only fuse reading > has been tested. Protection is not implemented. > > Reviewed-by: Avi Fishman > Signed-off-by: Havard Skinnemoen > --- > hw/arm/npcm7xx.c | 32 +++ > hw/nvram/Ma

[PATCH v4 08/12] hw/nvram: NPCM7xx OTP device model

2020-07-07 Thread Havard Skinnemoen
This supports reading and writing OTP fuses and keys. Only fuse reading has been tested. Protection is not implemented. Reviewed-by: Avi Fishman Signed-off-by: Havard Skinnemoen --- hw/arm/npcm7xx.c | 32 +++ hw/nvram/Makefile.objs | 1 + hw/nvram/npcm7xx_otp.c