Re: [PATCH v4 4/5] target/riscv: add fault-only-first unit stride load

2020-02-27 Thread LIU Zhiwei
On 2020/2/28 4:03, Richard Henderson wrote: On 2/25/20 2:35 AM, LIU Zhiwei wrote: +GEN_VEXT_LD_ELEM(vlbff_v_b, int8_t, int8_t, H1, ldsb) +GEN_VEXT_LD_ELEM(vlbff_v_h, int8_t, int16_t, H2, ldsb) +GEN_VEXT_LD_ELEM(vlbff_v_w, int8_t, int32_t, H4, ldsb) +GEN_VEXT_LD_ELEM(vlbff_v_d, int8_t, in

Re: [PATCH v4 4/5] target/riscv: add fault-only-first unit stride load

2020-02-27 Thread Richard Henderson
On 2/25/20 2:35 AM, LIU Zhiwei wrote: > +GEN_VEXT_LD_ELEM(vlbff_v_b, int8_t, int8_t, H1, ldsb) > +GEN_VEXT_LD_ELEM(vlbff_v_h, int8_t, int16_t, H2, ldsb) > +GEN_VEXT_LD_ELEM(vlbff_v_w, int8_t, int32_t, H4, ldsb) > +GEN_VEXT_LD_ELEM(vlbff_v_d, int8_t, int64_t, H8, ldsb) > +GEN_VEXT_LD_ELEM(vlhff

[PATCH v4 4/5] target/riscv: add fault-only-first unit stride load

2020-02-25 Thread LIU Zhiwei
The unit-stride fault-only-fault load instructions are used to vectorize loops with data-dependent exit conditions(while loops). These instructions execute as a regular load except that they will only take a trap on element 0. Signed-off-by: LIU Zhiwei --- target/riscv/helper.h