On 3/24/20 3:51 AM, LIU Zhiwei wrote:
>> (3) It would be handy to have TCGv cpu_vl.
> Do you mean I should define cpu_vl as a global TCG varible like cpu_pc?
> So that I can check vl==0 in translation time.
Yes.
>> vslide1up.vx:
>> Ho hum, I forgot about masking. Some options:
>> (1)
On 2020/3/17 1:42, Richard Henderson wrote:
On 3/16/20 1:04 AM, LIU Zhiwei wrote:
As a preference, I think you can do away with this helper.
Simply use the slideup helper with argument 1, and then
afterwards store the integer register into element 0. You should be able to
re-use code from
On 3/16/20 1:04 AM, LIU Zhiwei wrote:
>> As a preference, I think you can do away with this helper.
>> Simply use the slideup helper with argument 1, and then
>> afterwards store the integer register into element 0. You should be able to
>> re-use code from vmv.s.x for that.
> When I try it, I
On 2020/3/15 13:16, Richard Henderson wrote:
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
+#define GEN_VEXT_VSLIDEUP_VX(NAME, ETYPE, H, CLEAR_FN)\
+void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
+CPURISCVState *env, uint32_t desc)
On 3/14/20 11:49 PM, LIU Zhiwei wrote:
>>> +if (offset > vl) {\
>>> +offset = vl; \
>>> +} \
>> This isn't
On 2020/3/15 13:16, Richard Henderson wrote:
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
+#define GEN_VEXT_VSLIDEUP_VX(NAME, ETYPE, H, CLEAR_FN)\
+void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
+CPURISCVState *env, uint32_t desc)
On 3/12/20 7:58 AM, LIU Zhiwei wrote:
> +#define GEN_VEXT_VSLIDEUP_VX(NAME, ETYPE, H, CLEAR_FN)\
> +void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
> +CPURISCVState *env, uint32_t desc)\
> +{
Signed-off-by: LIU Zhiwei
---
target/riscv/helper.h | 17 +++
target/riscv/insn32.decode | 7 ++
target/riscv/insn_trans/trans_rvv.inc.c | 17 +++
target/riscv/vector_helper.c| 136
4 files changed, 177 insertions(+)
diff
