Re: [Qemu-devel] [PATCH] target/openrisc: Support non-busy idle state using PMR SPR

2017-04-29 Thread Stafford Horne
On Sat, Apr 29, 2017 at 11:32:52AM +0200, Richard Henderson wrote: > On 04/28/2017 11:10 PM, Stafford Horne wrote: > > +raise_exception(cpu, EXCP_HLT); > > One minor tweak -- EXCP_HALTED. > > HLT is, in theory, i386 specific. Not that you'd have noticed a difference. > FWIW, I've

Re: [Qemu-devel] [PATCH] target/openrisc: Support non-busy idle state using PMR SPR

2017-04-29 Thread Richard Henderson
On 04/28/2017 11:10 PM, Stafford Horne wrote: +raise_exception(cpu, EXCP_HLT); One minor tweak -- EXCP_HALTED. HLT is, in theory, i386 specific. Not that you'd have noticed a difference. FWIW, I've just found the same error in target/alpha. Otherwise, Reviewed-by: Richard

[Qemu-devel] [PATCH] target/openrisc: Support non-busy idle state using PMR SPR

2017-04-28 Thread Stafford Horne
The OpenRISC architecture has the Power Management Register (PMR) special purpose register to manage cpu power states. The interesting modes are: * Doze Mode (DME) - Stop cpu except timer & pic - wake on interrupt * Sleep Mode (SME) - Stop cpu and all units - wake on interrupt * Suspend Model