On Tue, Nov 12, 2013 at 8:32 AM, Alex Williamson
wrote:
> On Tue, 2013-11-12 at 07:55 +1000, Dave Airlie wrote:
>> On Tue, Nov 12, 2013 at 7:43 AM, Alex Williamson
>> wrote:
>> > When MSI is enabled on Nvidia GeForce cards the driver seems to
>> > acknowledge the interrupt by writing a 0xff byte
On Tue, 2013-11-12 at 07:55 +1000, Dave Airlie wrote:
> On Tue, Nov 12, 2013 at 7:43 AM, Alex Williamson
> wrote:
> > When MSI is enabled on Nvidia GeForce cards the driver seems to
> > acknowledge the interrupt by writing a 0xff byte to the MSI capability
> > ID register using the PCI config spac
On Tue, Nov 12, 2013 at 7:43 AM, Alex Williamson
wrote:
> When MSI is enabled on Nvidia GeForce cards the driver seems to
> acknowledge the interrupt by writing a 0xff byte to the MSI capability
> ID register using the PCI config space mirror at offset 0x88000 from
> BAR0. Without this, the devic
When MSI is enabled on Nvidia GeForce cards the driver seems to
acknowledge the interrupt by writing a 0xff byte to the MSI capability
ID register using the PCI config space mirror at offset 0x88000 from
BAR0. Without this, the device will only fire a single interrupt.
VFIO handles the PCI capabil
