On 07/12/2017 03:28 AM, Ricardo Ribalda Delgado wrote:
Hi Richard
Thanks for your patch! I have applied it to my tree, but i still get
SIGSEGV. I think that I might have found the problem. It seems to be
related to the bmi instruction blsr, which seems to be not properly
implemented.
You're
Hi Richard
Thanks for your patch! I have applied it to my tree, but i still get
SIGSEGV. I think that I might have found the problem. It seems to be
related to the bmi instruction blsr, which seems to be not properly
implemented.
On this example:
#include
int test_blsr(int val){
return (val
On 07/11/2017 11:21 AM, Richard Henderson wrote:
I am in the process of trying to run the gcc testsuite with -mtbm,
with and without the patchset, to see (1) if the new insns get used
and (2) that they run ok.
FWIW, make check-gcc RUNTESTFLAGS='--target_board=unix/-mtbm execute.exp' shows
204
These are general purpose bit manipulation instructions akin
to the BMI1 and BMI2 instructions. This is an AMD extension
and uses the XOP instruction prefix.
I am in the process of trying to run the gcc testsuite with -mtbm,
with and without the patchset, to see (1) if the new insns get used
and
