On 08/01/2012 04:00 PM, Andreas Färber wrote:
Am 23.07.2012 15:22, schrieb Igor Mammedov:
MP initialization protocol differs between cpu families, and for P6 and
onward models it is up to CPU to decide if it will be BSP using this
protocol, so try to model this. However there is no point in
Am 23.07.2012 15:22, schrieb Igor Mammedov:
MP initialization protocol differs between cpu families, and for P6 and
onward models it is up to CPU to decide if it will be BSP using this
protocol, so try to model this. However there is no point in implementing
MP initialization protocol in qemu.
MP initialization protocol differs between cpu families, and for P6 and
onward models it is up to CPU to decide if it will be BSP using this
protocol, so try to model this. However there is no point in implementing
MP initialization protocol in qemu. Thus first CPU is always marked as BSP.
This
On Tue, Jul 10, 2012 at 03:15:51PM +0200, Igor Mammedov wrote:
/* pc.c */
-int cpu_is_bsp(CPUX86State *env);
Why remove it instead of modifying it to check BSP bit in apic base?
I think it will make the patch smaller and open code the check does not
look nice.
--
Gleb.
On 07/12/2012 08:38 AM, Gleb Natapov wrote:
On Tue, Jul 10, 2012 at 03:15:51PM +0200, Igor Mammedov wrote:
/* pc.c */
-int cpu_is_bsp(CPUX86State *env);
Why remove it instead of modifying it to check BSP bit in apic base?
I think it will make the patch smaller and open code the check does
MP initialization protocol differs between cpu families, and for P6 and
onward models it is up to CPU to decide if it will be BSP using this
protocol, so try to model this. However there is no point in implementing
MP initialization protocol in qemu. Thus first CPU is always marked as BSP.
This
