Re: [Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from a vaddr in AArch32

2013-05-24 Thread Peter Maydell
On 23 May 2013 13:00, Peter Maydell peter.mayd...@linaro.org wrote: +#define DO_GEN_ST(OP)\ +static inline void gen_aa32_##OP(TCGv_i32 val, TCGv_i32 addr, int index) \ +{\

[Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from a vaddr in AArch32

2013-05-23 Thread Peter Maydell
AArch32 code (ie traditional 32 bit world) expects to be able to pass a vaddr in a TCGv_i32. However when QEMU is compiled with TARGET_LONG_BITS=32 the TCG load/store functions take a TCGv_i64. Abstract out load/store with a 32 bit vaddr so we have a place to put the zero extension of the vaddr

Re: [Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from a vaddr in AArch32

2013-05-23 Thread Richard Henderson
On 05/23/2013 05:00 AM, Peter Maydell wrote: AArch32 code (ie traditional 32 bit world) expects to be able to pass a vaddr in a TCGv_i32. However when QEMU is compiled with TARGET_LONG_BITS=32 the TCG load/store functions take a TCGv_i64. Abstract out load/store with a 32 bit vaddr so we have