Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-25 Thread Tom Musta
On 10/24/2013 3:38 PM, Richard Henderson wrote: On 10/24/2013 09:25 AM, Tom Musta wrote: \ snip +ft1 = tp##_to_##btp(s-fld[i], env-fp_status); \ +ft0 = btp##_##sum(ft0, ft1, env-fp_status);

Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-25 Thread Tom Musta
On 10/24/2013 3:38 PM, Richard Henderson wrote: On 10/24/2013 09:25 AM, Tom Musta wrote: \ +ft0 = tp##_to_##btp(xa.fld[i], env-fp_status); \ +ft1 = tp##_to_##btp(m-fld[i], env-fp_status); \

Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-25 Thread Richard Henderson
On 10/25/2013 09:25 AM, Tom Musta wrote: I tried recoding xsmaddadp using float64_muladd. The problem that I hit is the boundary case where the intermediate product and the summand are infinities of the opposite sign. This is the case handled by the first if in the code snippet above.

Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-25 Thread Tom Musta
On 10/25/2013 11:42 AM, Richard Henderson wrote: I believe that a better implementation could use float*_muladd, and check the result for float_flag_invalid. If set, compute the intermediate product so you can figure out the VXISI setting. But we'd expect that to be an unlikely path.

Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-25 Thread Peter Maydell
On 25 October 2013 17:25, Tom Musta tommu...@gmail.com wrote: On 10/24/2013 3:38 PM, Richard Henderson wrote: You want to be using tp##muladd instead of widening to 128 bits. I tried recoding xsmaddadp using float64_muladd. The problem that I hit is the boundary case where the intermediate

Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-25 Thread Richard Henderson
On 10/25/2013 10:13 AM, Tom Musta wrote: On 10/25/2013 11:42 AM, Richard Henderson wrote: I believe that a better implementation could use float*_muladd, and check the result for float_flag_invalid. If set, compute the intermediate product so you can figure out the VXISI setting. But we'd

Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-25 Thread Richard Henderson
On 10/25/2013 10:20 AM, Peter Maydell wrote: Are you sure that doing the arithmetic with the softfloat 128 bit float operations doesn't set the inexact flag anywhere it shouldn't? (ie where the intermediate product is not exact in 128 bit format but the final result is exact in 64 or 32 bits).

[Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-24 Thread Tom Musta
This patch adds the VSX floating point multiply/add instructions defined by V2.06 of the PowerPC ISA: - xsmaddadp, xvmaddadp, xvmaddasp - xsmaddmdp, xvmaddmdp, xvmaddmsp - xsmsubadp, xvmsubadp, xvmsubasp - xsmsubmdp, xvmsubmdp, xvmsubmsp - xsnmaddadp, xvnmaddadp, xvnmaddasp -

Re: [Qemu-devel] [PATCH 13/19] Add VSX ISA2.06 Multiply Add Instructions

2013-10-24 Thread Richard Henderson
On 10/24/2013 09:25 AM, Tom Musta wrote: \ +ft0 = tp##_to_##btp(xa.fld[i], env-fp_status); \ +ft1 = tp##_to_##btp(m-fld[i], env-fp_status); \ +ft0 = btp##_mul(ft0, ft1,