Re: [Qemu-devel] [PATCH 2/3] target-arm: Fix soft interrupt in GIC distributor

2011-02-21 Thread Peter Maydell
On 15 February 2011 10:49, Adam Lackorzynski a...@os.inf.tu-dresden.de wrote:
 Fix selection of target list filter mode.

 Signed-off-by: Adam Lackorzynski a...@os.inf.tu-dresden.de

Reviewed-by: Peter Maydell peter.mayd...@linaro.org

-- PMM



Re: [Qemu-devel] [PATCH 2/3] target-arm: Fix soft interrupt in GIC distributor

2011-02-16 Thread Peter Maydell
On 15 February 2011 10:49, Adam Lackorzynski a...@os.inf.tu-dresden.de wrote:
 Fix selection of target list filter mode.

 Signed-off-by: Adam Lackorzynski a...@os.inf.tu-dresden.de
 ---
  hw/arm_gic.c |    4 ++--
  1 files changed, 2 insertions(+), 2 deletions(-)

 diff --git a/hw/arm_gic.c b/hw/arm_gic.c
 index e6b1953..0e934ec 100644
 --- a/hw/arm_gic.c
 +++ b/hw/arm_gic.c
 @@ -549,10 +549,10 @@ static void gic_dist_writel(void *opaque, 
 target_phys_addr_t offset,
             mask = (value  16)  ALL_CPU_MASK;
             break;
         case 1:
 -            mask = 1  cpu;
 +            mask = ALL_CPU_MASK ^ (1  cpu);
             break;
         case 2:
 -            mask = ALL_CPU_MASK ^ (1  cpu);
 +            mask = 1  cpu;
             break;
         default:
             DPRINTF(Bad Soft Int target filter\n);

This looks like a good fix based on the TRM; however I don't have an
A9-based image to hand to test with so I've asked a colleague to give
it a quick smoke test before I formally mark it as reviewed-by me
(probably some time next week).

thanks
-- PMM



[Qemu-devel] [PATCH 2/3] target-arm: Fix soft interrupt in GIC distributor

2011-02-15 Thread Adam Lackorzynski
Fix selection of target list filter mode.

Signed-off-by: Adam Lackorzynski a...@os.inf.tu-dresden.de
---
 hw/arm_gic.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index e6b1953..0e934ec 100644
--- a/hw/arm_gic.c
+++ b/hw/arm_gic.c
@@ -549,10 +549,10 @@ static void gic_dist_writel(void *opaque, 
target_phys_addr_t offset,
 mask = (value  16)  ALL_CPU_MASK;
 break;
 case 1:
-mask = 1  cpu;
+mask = ALL_CPU_MASK ^ (1  cpu);
 break;
 case 2:
-mask = ALL_CPU_MASK ^ (1  cpu);
+mask = 1  cpu;
 break;
 default:
 DPRINTF(Bad Soft Int target filter\n);
-- 
1.7.2.3


Adam
-- 
Adam a...@os.inf.tu-dresden.de
  Lackorzynski http://os.inf.tu-dresden.de/~adam/