Re: [Qemu-devel] [PATCH 3/4] tcg/aarch64: implement sign/zero extend operations

2013-06-03 Thread Claudio Fontana
On 31.05.2013 21:13, Richard Henderson wrote: On 05/31/2013 11:05 AM, Jani Kokkonen wrote: +static inline void tcg_out_uxt(TCGContext *s, int s_bits, + TCGReg rd, TCGReg rn) +{ +/* using ALIASes UXTB 0x53001c00, UXTH 0x53003c00 + of UBFM Wd, Wn, #0,

Re: [Qemu-devel] [PATCH 3/4] tcg/aarch64: implement sign/zero extend operations

2013-05-31 Thread Richard Henderson
On 05/31/2013 11:05 AM, Jani Kokkonen wrote: +static inline void tcg_out_uxt(TCGContext *s, int s_bits, + TCGReg rd, TCGReg rn) +{ +/* using ALIASes UXTB 0x53001c00, UXTH 0x53003c00 + of UBFM Wd, Wn, #0, #7|15 and mov */ +int bits = 8 * (1 s_bits)

[Qemu-devel] [PATCH 3/4] tcg/aarch64: implement sign/zero extend operations

2013-05-31 Thread Jani Kokkonen
From: Claudio Fontana claudio.font...@huawei.com implement the optional sign/zero extend operations with the dedicated aarch64 instructions. These instructions are also needed for the tlb lookup. Signed-off-by: Claudio Fontana claudio.font...@huawei.com --- tcg/aarch64/tcg-target.c | 58