Re: [Qemu-devel] [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM support

2012-11-29 Thread Auld, Will
Marcelo, The behavior on reset is to return the TSC_AJUST msr value to 0x0. I am currently initializing this emulated msr in kvm_arch_vcpu_init(). - Behaviour on reset: what is the behaviour on RESET? I am testing the rebase now. I would like to get any needed changes for this initialization

Re: [Qemu-devel] [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM support

2012-11-29 Thread Marcelo Tosatti
On Thu, Nov 29, 2012 at 07:21:28PM +, Auld, Will wrote: Marcelo, The behavior on reset is to return the TSC_AJUST msr value to 0x0. I am currently initializing this emulated msr in kvm_arch_vcpu_init(). Will, Reset is handled by QEMU. kvm_arch_vcpu_init is only called during vcpu

Re: [Qemu-devel] [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM support

2012-11-29 Thread Auld, Will
Marcelo, My latest QEMU patch ([PATCH V5] target-i386: Enabling IA32_TSC_ADJUST for QEMU KVM guest VMs) seems to be OK with regards to reset. The tsc_adjust variable is being zeroed by the memset() in x86_cpu_reset(). Later code seems to write these values through kvm_put_msr() by way of

Re: [Qemu-devel] [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM support

2012-11-28 Thread Auld, Will
Thanks Amos. From: Amos Kong [mailto:kongjian...@gmail.com] Sent: Tuesday, November 27, 2012 6:39 PM To: Auld, Will Cc: Marcelo Tosatti; k...@vger.kernel.org; Dugger, Donald D; Liu, Jinsong; Zhang, Xiantao; a...@redhat.com; qemu-devel; Gleb Subject: Re: [PATCH V5 2/2] Enabling IA32_TSC_ADJUST

[Qemu-devel] [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM support

2012-11-27 Thread Will Auld
CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported Basic design is to emulate the MSR by allowing reads and writes to a guest vcpu specific location to store the value of the emulated MSR while adding the value to the vmcs tsc_offset. In this way the IA32_TSC_ADJUST value will be

Re: [Qemu-devel] [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM support

2012-11-27 Thread Marcelo Tosatti
Hi Will, On Tue, Nov 27, 2012 at 11:09:00AM -0800, Will Auld wrote: CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported Basic design is to emulate the MSR by allowing reads and writes to a guest vcpu specific location to store the value of the emulated MSR while adding the

Re: [Qemu-devel] [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM support

2012-11-27 Thread Auld, Will
Thanks Marcelo, I'll address these items. - Please rebase against queue branch on kvm.git. I am not sure how to do this. The repository I have been working against is: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git I assume that I need to change this in some way but I am

Re: [Qemu-devel] [PATCH V5 2/2] Enabling IA32_TSC_ADJUST for KVM guest VM support

2012-11-27 Thread Amos Kong
On Wed, Nov 28, 2012 at 10:29 AM, Auld, Will will.a...@intel.com wrote: Thanks Marcelo, I'll address these items. - Please rebase against queue branch on kvm.git. I am not sure how to do this. The repository I have been working against is: