[ ... ]
>>> +void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state)
>>> +{
>>> +ICSState *ics = >ics;
>>> +uint32_t xivr_reg;
>>> +uint32_t stat_reg;
>>> +uint64_t stat_bit;
>>> +uint32_t src;
>>> +bool masked;
>>> +
>>> +if (!pnv_psi_irq_bits(psi, irq, _reg,
On 03/17/2017 03:00 AM, David Gibson wrote:
> On Thu, Mar 16, 2017 at 02:52:17PM +0100, Cédric Le Goater wrote:
>> On 03/15/2017 07:16 AM, David Gibson wrote:
>>> On Wed, Mar 08, 2017 at 11:52:49AM +0100, Cédric Le Goater wrote:
From: Benjamin Herrenschmidt
On Thu, Mar 16, 2017 at 02:52:17PM +0100, Cédric Le Goater wrote:
> On 03/15/2017 07:16 AM, David Gibson wrote:
> > On Wed, Mar 08, 2017 at 11:52:49AM +0100, Cédric Le Goater wrote:
> >> From: Benjamin Herrenschmidt
> >>
> >> The PSI (Processor Service Interface)
On 03/15/2017 07:16 AM, David Gibson wrote:
> On Wed, Mar 08, 2017 at 11:52:49AM +0100, Cédric Le Goater wrote:
>> From: Benjamin Herrenschmidt
>>
>> The PSI (Processor Service Interface) Controller is one of the engines
>> of the "Bridge" unit which connects the
On Wed, 2017-03-15 at 17:16 +1100, David Gibson wrote:
> It might be cleaner to just revaluate the irq level from scratch
> here,
> and set the level, rather than doing this complicated dance to work
> out if it has changed.
Hrm... there was a reason I did it this way but I can't quite remember
On Wed, Mar 08, 2017 at 11:52:49AM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> The PSI (Processor Service Interface) Controller is one of the engines
> of the "Bridge" unit which connects the different interfaces to the
> Power Processor.
>
> This
From: Benjamin Herrenschmidt
The PSI (Processor Service Interface) Controller is one of the engines
of the "Bridge" unit which connects the different interfaces to the
Power Processor.
This adds just enough of the PSI bridge to handle various on-chip and
the one