Re: [Qemu-devel] [PATCH for 2.10] hw/mps2_scc: fix incorrect properties

[Peter Maydell]

On 30 July 2017 at 00:49, Philippe Mathieu-Daudé  wrote:
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
> sorry, I missed them in my review :(
>
>  hw/misc/mps2-scc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/misc/mps2-scc.c b/hw/misc/mps2-scc.c
> index cc58d26f29..32be2a9df1 100644
> --- a/hw/misc/mps2-scc.c
> +++ b/hw/misc/mps2-scc.c
> @@ -270,9 +270,9 @@ static Property mps2_scc_properties[] = {
>  /* Values for various read-only ID registers (which are specific
>   * to the board model or FPGA image)
>   */
> -DEFINE_PROP_UINT32("scc-cfg4", MPS2SCC, aid, 0),
> +DEFINE_PROP_UINT32("scc-cfg4", MPS2SCC, cfg4, 0),
>  DEFINE_PROP_UINT32("scc-aid", MPS2SCC, aid, 0),
> -DEFINE_PROP_UINT32("scc-id", MPS2SCC, aid, 0),
> +DEFINE_PROP_UINT32("scc-id", MPS2SCC, id, 0),
>  /* These are the initial settings for the source clocks on the board.
>   * In hardware they can be configured via a config file read by the
>   * motherboard configuration controller to suit the FPGA image.
> --
> 2.13.3

Oops, nice catch. Applied to target-arm.next for 2.10.

thanks
-- PMM

[Qemu-devel] [PATCH for 2.10] hw/mps2_scc: fix incorrect properties

[Philippe Mathieu-Daudé]

Signed-off-by: Philippe Mathieu-Daudé 
---
sorry, I missed them in my review :(

 hw/misc/mps2-scc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/misc/mps2-scc.c b/hw/misc/mps2-scc.c
index cc58d26f29..32be2a9df1 100644
--- a/hw/misc/mps2-scc.c
+++ b/hw/misc/mps2-scc.c
@@ -270,9 +270,9 @@ static Property mps2_scc_properties[] = {
 /* Values for various read-only ID registers (which are specific
  * to the board model or FPGA image)
  */
-DEFINE_PROP_UINT32("scc-cfg4", MPS2SCC, aid, 0),
+DEFINE_PROP_UINT32("scc-cfg4", MPS2SCC, cfg4, 0),
 DEFINE_PROP_UINT32("scc-aid", MPS2SCC, aid, 0),
-DEFINE_PROP_UINT32("scc-id", MPS2SCC, aid, 0),
+DEFINE_PROP_UINT32("scc-id", MPS2SCC, id, 0),
 /* These are the initial settings for the source clocks on the board.
  * In hardware they can be configured via a config file read by the
  * motherboard configuration controller to suit the FPGA image.
-- 
2.13.3