Re: [Qemu-devel] [PATCH v1 1/2] intel-iommu: Redefine macros to enable supporting 48 bit address width

2017-12-01 Thread Prasad Singamsetty
On 12/1/2017 3:23 AM, Liu, Yi L wrote: On Tue, Nov 14, 2017 at 06:13:49PM -0500, prasad.singamse...@oracle.com wrote: From: Prasad Singamsetty The current implementation of Intel IOMMU code only supports 39 bits host/iova address width so number of macros use

Re: [Qemu-devel] [PATCH v1 1/2] intel-iommu: Redefine macros to enable supporting 48 bit address width

2017-12-01 Thread Liu, Yi L
On Tue, Nov 14, 2017 at 06:13:49PM -0500, prasad.singamse...@oracle.com wrote: > From: Prasad Singamsetty > > The current implementation of Intel IOMMU code only supports 39 bits > host/iova address width so number of macros use hard coded values based > on that.

[Qemu-devel] [PATCH v1 1/2] intel-iommu: Redefine macros to enable supporting 48 bit address width

2017-11-14 Thread prasad . singamsetty
From: Prasad Singamsetty The current implementation of Intel IOMMU code only supports 39 bits host/iova address width so number of macros use hard coded values based on that. This patch is to redefine them so they can be used with variable address widths. This