Re: [Qemu-devel] [PATCH v1 1/5] sifive_e: Fix crash when introspecting the device

[Michael Clark]

On Wed, Jul 18, 2018 at 8:27 AM, Alistair Francis 
wrote:

> Use the new object_initialize_child() and sysbus_init_child_obj() to
> fix the issue.
>
> Signed-off-by: Alistair Francis 
>

Reviewed-by: Michael Clark 


> ---
>  hw/riscv/sifive_e.c | 12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index 8a8dbe1c00..4577d72037 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -105,9 +105,9 @@ static void riscv_sifive_e_init(MachineState *machine)
>  int i;
>
>  /* Initialize SoC */
> -object_initialize(>soc, sizeof(s->soc), TYPE_RISCV_E_SOC);
> -object_property_add_child(OBJECT(machine), "soc", OBJECT(>soc),
> -  _abort);
> +object_initialize_child(OBJECT(machine), "soc", >soc,
> +sizeof(s->soc), TYPE_RISCV_E_SOC,
> +_abort, NULL);
>  object_property_set_bool(OBJECT(>soc), true, "realized",
>  _abort);
>
> @@ -139,9 +139,9 @@ static void riscv_sifive_e_soc_init(Object *obj)
>  {
>  SiFiveESoCState *s = RISCV_E_SOC(obj);
>
> -object_initialize(>cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY);
> -object_property_add_child(obj, "cpus", OBJECT(>cpus),
> -  _abort);
> +object_initialize_child(obj, "cpus", >cpus,
> +sizeof(s->cpus), TYPE_RISCV_HART_ARRAY,
> +_abort, NULL);
>  object_property_set_str(OBJECT(>cpus), SIFIVE_E_CPU, "cpu-type",
>  _abort);
>  object_property_set_int(OBJECT(>cpus), smp_cpus, "num-harts",
> --
> 2.17.1
>
>

[Qemu-devel] [PATCH v1 1/5] sifive_e: Fix crash when introspecting the device

[Alistair Francis]

Use the new object_initialize_child() and sysbus_init_child_obj() to
fix the issue.

Signed-off-by: Alistair Francis 
---
 hw/riscv/sifive_e.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index 8a8dbe1c00..4577d72037 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -105,9 +105,9 @@ static void riscv_sifive_e_init(MachineState *machine)
 int i;
 
 /* Initialize SoC */
-object_initialize(>soc, sizeof(s->soc), TYPE_RISCV_E_SOC);
-object_property_add_child(OBJECT(machine), "soc", OBJECT(>soc),
-  _abort);
+object_initialize_child(OBJECT(machine), "soc", >soc,
+sizeof(s->soc), TYPE_RISCV_E_SOC,
+_abort, NULL);
 object_property_set_bool(OBJECT(>soc), true, "realized",
 _abort);
 
@@ -139,9 +139,9 @@ static void riscv_sifive_e_soc_init(Object *obj)
 {
 SiFiveESoCState *s = RISCV_E_SOC(obj);
 
-object_initialize(>cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY);
-object_property_add_child(obj, "cpus", OBJECT(>cpus),
-  _abort);
+object_initialize_child(obj, "cpus", >cpus,
+sizeof(s->cpus), TYPE_RISCV_HART_ARRAY,
+_abort, NULL);
 object_property_set_str(OBJECT(>cpus), SIFIVE_E_CPU, "cpu-type",
 _abort);
 object_property_set_int(OBJECT(>cpus), smp_cpus, "num-harts",
-- 
2.17.1