Re: [Qemu-devel] [PATCH v1 23/30] RISC-V: Fix CLINT timecmp low 32-bit writes

2018-05-25 Thread Alistair Francis
On Tue, May 22, 2018 at 5:15 PM, Michael Clark wrote: > A missing shift made updates to the low order bits > of timecmp erroneously copy the old low order bits > into the high order bits of the 64-bit timecmp > register. Add the missing shift and rename timecmp > local variables to timecmp_hi and

[Qemu-devel] [PATCH v1 23/30] RISC-V: Fix CLINT timecmp low 32-bit writes

2018-05-22 Thread Michael Clark
A missing shift made updates to the low order bits of timecmp erroneously copy the old low order bits into the high order bits of the 64-bit timecmp register. Add the missing shift and rename timecmp local variables to timecmp_hi and timecmp_lo. This bug didn't show up as the low order bits are us