Re: [Qemu-devel] [PATCH v2 5/8] ppc/xics: Make the ICSState a list

[Benjamin Herrenschmidt]

On Wed, 2016-06-29 at 13:37 +1000, David Gibson wrote:
> AFAICT xirr_owner will be lost on migration, which will break things.
> That will need to be transferred on migration, somehow.  If it can be
> recalculated from existing data in post_load() that would be ideal,
> otherwise we'll have to devise a wire encoding for it.

It should be possible to get it back from the interrupt number by
walking the list of ICS yes.

Cheers,
Ben.

Re: [Qemu-devel] [PATCH v2 5/8] ppc/xics: Make the ICSState a list

[David Gibson]

On Wed, Jun 29, 2016 at 12:35:16AM +0530, Nikunj A Dadhania wrote:
> From: Benjamin Herrenschmidt 
> 
> Instead of an array of fixed sized blocks, use a list, as we will need
> to have sources with variable number of interrupts. SPAPR only uses
> a single entry. Native will create more. If performance becomes an
> issue we can add some hashed lookup but for now this will do fine.
> 
> Signed-off-by: Benjamin Herrenschmidt 
> [ move the initialization of list to xics_common_initfn ]
> Signed-off-by: Nikunj A Dadhania 

AFAICT xirr_owner will be lost on migration, which will break things.
That will need to be transferred on migration, somehow.  If it can be
recalculated from existing data in post_load() that would be ideal,
otherwise we'll have to devise a wire encoding for it.

> ---
>  hw/intc/trace-events  |  4 +--
>  hw/intc/xics.c| 83 
>  hw/intc/xics_kvm.c| 27 +++-
>  hw/intc/xics_spapr.c  | 88 
> +--
>  hw/ppc/spapr_events.c |  2 +-
>  hw/ppc/spapr_pci.c|  5 ++-
>  hw/ppc/spapr_vio.c|  2 +-
>  include/hw/ppc/xics.h | 13 
>  8 files changed, 138 insertions(+), 86 deletions(-)
> 
> diff --git a/hw/intc/trace-events b/hw/intc/trace-events
> index 376dd18..5f0f783 100644
> --- a/hw/intc/trace-events
> +++ b/hw/intc/trace-events
> @@ -56,8 +56,8 @@ xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d 
> [irq %#x]"
>  xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) 
> "ics_write_xive: irq %#x [src %d] server %#x prio %#x"
>  xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
>  xics_ics_eoi(int nr) "ics_eoi: irq %#x"
> -xics_alloc(int src, int irq) "source#%d, irq %d"
> -xics_alloc_block(int src, int first, int num, bool lsi, int align) 
> "source#%d, first irq %d, %d irqs, lsi=%d, alignnum %d"
> +xics_alloc(int irq) "irq %d"
> +xics_alloc_block(int first, int num, bool lsi, int align) "first irq %d, %d 
> irqs, lsi=%d, alignnum %d"
>  xics_ics_free(int src, int irq, int num) "Source#%d, first irq %d, %d irqs"
>  xics_ics_free_warn(int src, int irq) "Source#%d, irq %d is already free"
>  
> diff --git a/hw/intc/xics.c b/hw/intc/xics.c
> index cd48f42..5148bdf 100644
> --- a/hw/intc/xics.c
> +++ b/hw/intc/xics.c
> @@ -96,13 +96,16 @@ void xics_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
>  static void xics_common_reset(DeviceState *d)
>  {
>  XICSState *xics = XICS_COMMON(d);
> +ICSState *ics;
>  int i;
>  
>  for (i = 0; i < xics->nr_servers; i++) {
>  device_reset(DEVICE(>ss[i]));
>  }
>  
> -device_reset(DEVICE(xics->ics));
> +QLIST_FOREACH(ics, >ics, list) {
> +device_reset(DEVICE(ics));
> +}
>  }
>  
>  static void xics_prop_get_nr_irqs(Object *obj, Visitor *v, const char *name,
> @@ -134,7 +137,6 @@ static void xics_prop_set_nr_irqs(Object *obj, Visitor 
> *v, const char *name,
>  }
>  
>  assert(info->set_nr_irqs);
> -assert(xics->ics);
>  info->set_nr_irqs(xics, value, errp);
>  }
>  
> @@ -174,6 +176,9 @@ static void xics_prop_set_nr_servers(Object *obj, Visitor 
> *v,
>  
>  static void xics_common_initfn(Object *obj)
>  {
> +XICSState *xics = XICS_COMMON(obj);
> +
> +QLIST_INIT(>ics);
>  object_property_add(obj, "nr_irqs", "int",
>  xics_prop_get_nr_irqs, xics_prop_set_nr_irqs,
>  NULL, NULL, NULL);
> @@ -212,33 +217,35 @@ static void ics_reject(ICSState *ics, int nr);
>  static void ics_resend(ICSState *ics);
>  static void ics_eoi(ICSState *ics, int nr);
>  
> -static void icp_check_ipi(XICSState *xics, int server)
> +static void icp_check_ipi(ICPState *ss)
>  {
> -ICPState *ss = xics->ss + server;
> -
>  if (XISR(ss) && (ss->pending_priority <= ss->mfrr)) {
>  return;
>  }
>  
> -trace_xics_icp_check_ipi(server, ss->mfrr);
> +trace_xics_icp_check_ipi(ss->cs->cpu_index, ss->mfrr);
>  
> -if (XISR(ss)) {
> -ics_reject(xics->ics, XISR(ss));
> +if (XISR(ss) && ss->xirr_owner) {
> +ics_reject(ss->xirr_owner, XISR(ss));
>  }
>  
>  ss->xirr = (ss->xirr & ~XISR_MASK) | XICS_IPI;
>  ss->pending_priority = ss->mfrr;
> +ss->xirr_owner = NULL;
>  qemu_irq_raise(ss->output);
>  }
>  
>  static void icp_resend(XICSState *xics, int server)
>  {
>  ICPState *ss = xics->ss + server;
> +ICSState *ics;
>  
>  if (ss->mfrr < CPPR(ss)) {
> -icp_check_ipi(xics, server);
> +icp_check_ipi(ss);
> +}
> +QLIST_FOREACH(ics, >ics, list) {
> +ics_resend(ics);
>  }
> -ics_resend(xics->ics);
>  }
>  
>  void icp_set_cppr(XICSState *xics, int server, uint8_t cppr)
> @@ -256,7 +263,10 @@ void icp_set_cppr(XICSState *xics, int server, uint8_t 
> cppr)
>  ss->xirr &= ~XISR_MASK; /* Clear XISR */
>  

[Qemu-devel] [PATCH v2 5/8] ppc/xics: Make the ICSState a list

[Nikunj A Dadhania]

From: Benjamin Herrenschmidt 

Instead of an array of fixed sized blocks, use a list, as we will need
to have sources with variable number of interrupts. SPAPR only uses
a single entry. Native will create more. If performance becomes an
issue we can add some hashed lookup but for now this will do fine.

Signed-off-by: Benjamin Herrenschmidt 
[ move the initialization of list to xics_common_initfn ]
Signed-off-by: Nikunj A Dadhania 
---
 hw/intc/trace-events  |  4 +--
 hw/intc/xics.c| 83 
 hw/intc/xics_kvm.c| 27 +++-
 hw/intc/xics_spapr.c  | 88 +--
 hw/ppc/spapr_events.c |  2 +-
 hw/ppc/spapr_pci.c|  5 ++-
 hw/ppc/spapr_vio.c|  2 +-
 include/hw/ppc/xics.h | 13 
 8 files changed, 138 insertions(+), 86 deletions(-)

diff --git a/hw/intc/trace-events b/hw/intc/trace-events
index 376dd18..5f0f783 100644
--- a/hw/intc/trace-events
+++ b/hw/intc/trace-events
@@ -56,8 +56,8 @@ xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d 
[irq %#x]"
 xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) 
"ics_write_xive: irq %#x [src %d] server %#x prio %#x"
 xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
 xics_ics_eoi(int nr) "ics_eoi: irq %#x"
-xics_alloc(int src, int irq) "source#%d, irq %d"
-xics_alloc_block(int src, int first, int num, bool lsi, int align) "source#%d, 
first irq %d, %d irqs, lsi=%d, alignnum %d"
+xics_alloc(int irq) "irq %d"
+xics_alloc_block(int first, int num, bool lsi, int align) "first irq %d, %d 
irqs, lsi=%d, alignnum %d"
 xics_ics_free(int src, int irq, int num) "Source#%d, first irq %d, %d irqs"
 xics_ics_free_warn(int src, int irq) "Source#%d, irq %d is already free"
 
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index cd48f42..5148bdf 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -96,13 +96,16 @@ void xics_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
 static void xics_common_reset(DeviceState *d)
 {
 XICSState *xics = XICS_COMMON(d);
+ICSState *ics;
 int i;
 
 for (i = 0; i < xics->nr_servers; i++) {
 device_reset(DEVICE(>ss[i]));
 }
 
-device_reset(DEVICE(xics->ics));
+QLIST_FOREACH(ics, >ics, list) {
+device_reset(DEVICE(ics));
+}
 }
 
 static void xics_prop_get_nr_irqs(Object *obj, Visitor *v, const char *name,
@@ -134,7 +137,6 @@ static void xics_prop_set_nr_irqs(Object *obj, Visitor *v, 
const char *name,
 }
 
 assert(info->set_nr_irqs);
-assert(xics->ics);
 info->set_nr_irqs(xics, value, errp);
 }
 
@@ -174,6 +176,9 @@ static void xics_prop_set_nr_servers(Object *obj, Visitor 
*v,
 
 static void xics_common_initfn(Object *obj)
 {
+XICSState *xics = XICS_COMMON(obj);
+
+QLIST_INIT(>ics);
 object_property_add(obj, "nr_irqs", "int",
 xics_prop_get_nr_irqs, xics_prop_set_nr_irqs,
 NULL, NULL, NULL);
@@ -212,33 +217,35 @@ static void ics_reject(ICSState *ics, int nr);
 static void ics_resend(ICSState *ics);
 static void ics_eoi(ICSState *ics, int nr);
 
-static void icp_check_ipi(XICSState *xics, int server)
+static void icp_check_ipi(ICPState *ss)
 {
-ICPState *ss = xics->ss + server;
-
 if (XISR(ss) && (ss->pending_priority <= ss->mfrr)) {
 return;
 }
 
-trace_xics_icp_check_ipi(server, ss->mfrr);
+trace_xics_icp_check_ipi(ss->cs->cpu_index, ss->mfrr);
 
-if (XISR(ss)) {
-ics_reject(xics->ics, XISR(ss));
+if (XISR(ss) && ss->xirr_owner) {
+ics_reject(ss->xirr_owner, XISR(ss));
 }
 
 ss->xirr = (ss->xirr & ~XISR_MASK) | XICS_IPI;
 ss->pending_priority = ss->mfrr;
+ss->xirr_owner = NULL;
 qemu_irq_raise(ss->output);
 }
 
 static void icp_resend(XICSState *xics, int server)
 {
 ICPState *ss = xics->ss + server;
+ICSState *ics;
 
 if (ss->mfrr < CPPR(ss)) {
-icp_check_ipi(xics, server);
+icp_check_ipi(ss);
+}
+QLIST_FOREACH(ics, >ics, list) {
+ics_resend(ics);
 }
-ics_resend(xics->ics);
 }
 
 void icp_set_cppr(XICSState *xics, int server, uint8_t cppr)
@@ -256,7 +263,10 @@ void icp_set_cppr(XICSState *xics, int server, uint8_t 
cppr)
 ss->xirr &= ~XISR_MASK; /* Clear XISR */
 ss->pending_priority = 0xff;
 qemu_irq_lower(ss->output);
-ics_reject(xics->ics, old_xisr);
+if (ss->xirr_owner) {
+ics_reject(ss->xirr_owner, old_xisr);
+ss->xirr_owner = NULL;
+}
 }
 } else {
 if (!XISR(ss)) {
@@ -271,7 +281,7 @@ void icp_set_mfrr(XICSState *xics, int server, uint8_t mfrr)
 
 ss->mfrr = mfrr;
 if (mfrr < CPPR(ss)) {
-icp_check_ipi(xics, server);
+icp_check_ipi(ss);
 }
 }
 
@@ -282,6 +292,7 @@ uint32_t icp_accept(ICPState *ss)
 qemu_irq_lower(ss->output);