Signed-off-by: Richard Henderson
---
target/arm/translate.c | 26 +++---
target/arm/t16.decode | 12
2 files changed, 15 insertions(+), 23 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 5f876290ba..941266df14 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10599,7 +10599,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t
insn)
static void disas_thumb_insn(DisasContext *s, uint32_t insn)
{
-uint32_t val, op, rm, rd, shift, cond;
+uint32_t val, op, rm, rd, shift;
int32_t offset;
TCGv_i32 tmp;
TCGv_i32 tmp2;
@@ -10738,28 +10738,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t
insn)
}
break;
-case 13:
-/* conditional branch or swi */
-cond = (insn >> 8) & 0xf;
-if (cond == 0xe)
-goto undef;
-
-if (cond == 0xf) {
-/* swi */
-gen_set_pc_im(s, s->base.pc_next);
-s->svc_imm = extract32(insn, 0, 8);
-s->base.is_jmp = DISAS_SWI;
-break;
-}
-/* generate a conditional jump to next instruction */
-arm_skip_unless(s, cond);
-
-/* jump to the offset */
-val = read_pc(s);
-offset = ((int32_t)insn << 24) >> 24;
-val += offset << 1;
-gen_jmp(s, val);
-break;
+case 13: /* conditional branch or swi, in decodetree */
+goto illegal_op;
case 14:
if (insn & (1 << 11)) {
diff --git a/target/arm/t16.decode b/target/arm/t16.decode
index d731402036..98d60952a1 100644
--- a/target/arm/t16.decode
+++ b/target/arm/t16.decode
@@ -28,11 +28,13 @@
!extern rd rm
!extern rd imm
!extern rm
+ !extern imm
_rr !extern p w u rn rt rm shimm shtype
_ri !extern p w u rn rt imm
_block !extern rn i b u w list
!extern E
!extern mode imod M A I F
+ !extern cond imm
# Set S if the instruction is outside of an IT block.
%s !function=t16_setflags
@@ -231,3 +233,13 @@ STM 1011 010 . \
_block i=0 b=1 u=0 w=1 rn=13 list=%push_list
LDM_t16 1011 110 . \
_block i=1 b=0 u=0 w=1 rn=13 list=%pop_list
+
+# Conditional branches, Supervisor call
+
+%imm8_0x2 0:s8 !function=times_2
+
+{
+ UDF 1101 1110
+ SVC 1101 imm:8
+ B_cond_thumb 1101 cond:4 imm=%imm8_0x2
+}
--
2.17.1
