Re: [Qemu-devel] [PATCH v4 0/3] Add Aspeed GPIO controller model
On Fri, 2019-08-16 at 18:21 +0200, Cédric Le Goater wrote: > On 16/08/2019 09:32, Rashmica Gupta wrote: > > v5: > > - integrated AspeedGPIOController fields into AspeedGPIOClass > > - separated ast2600_3_6v and ast2600_1_8v into two classes > > Rashmica, > > This looks much nicer ! > > Please take a look at branch aspeed-4.2 in which I have merged your > v5 and modified slightly the ast2600 part. > > > https://github.com/legoater/qemu/commit/02b3df3f1a380eec4df7c49e88fa7ba27f75a610 > > I introduced a gpio_1_8v controller with its specific MMIO and IRQ > definitions. Tell me what you think of it. The principal motivation > behind these adjustments is that I don't know yet how we are going > to instantiate/realize the specific models of the AST2600 SoC. the > GPIO 1.8v is one of these extra controllers. This looks like a much better way to do this! > > Thanks, > > C. > > > v4: > > - proper interupt handling thanks to Andrew > > - switch statements for reading and writing suggested by Peter > > - some small cleanups suggested by Alexey > > > > v3: > > - didn't have each gpio set up as an irq > > - now can't access set AC on ast2400 (only exists on ast2500) > > - added ast2600 implementation (patch 3) > > - renamed a couple of variables for clarity > > > > v2: Addressed Andrew's feedback, added debounce regs, renamed > > get/set to > > read/write to minimise confusion with a 'set' of registers. > > > > Rashmica Gupta (3): > > hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500 > > aspeed: add a GPIO controller to the SoC > > hw/gpio: Add in AST2600 specific implementation > > > > include/hw/arm/aspeed_soc.h |3 + > > include/hw/gpio/aspeed_gpio.h | 100 > > hw/arm/aspeed_soc.c | 17 + > > hw/gpio/aspeed_gpio.c | 1006 > > + > > hw/gpio/Makefile.objs |1 + > > 5 files changed, 1127 insertions(+) > > create mode 100644 include/hw/gpio/aspeed_gpio.h > > create mode 100644 hw/gpio/aspeed_gpio.c > >
Re: [Qemu-devel] [PATCH v4 0/3] Add Aspeed GPIO controller model
On 16/08/2019 09:32, Rashmica Gupta wrote: > v5: > - integrated AspeedGPIOController fields into AspeedGPIOClass > - separated ast2600_3_6v and ast2600_1_8v into two classes Rashmica, This looks much nicer ! Please take a look at branch aspeed-4.2 in which I have merged your v5 and modified slightly the ast2600 part. https://github.com/legoater/qemu/commit/02b3df3f1a380eec4df7c49e88fa7ba27f75a610 I introduced a gpio_1_8v controller with its specific MMIO and IRQ definitions. Tell me what you think of it. The principal motivation behind these adjustments is that I don't know yet how we are going to instantiate/realize the specific models of the AST2600 SoC. the GPIO 1.8v is one of these extra controllers. Thanks, C. > v4: > - proper interupt handling thanks to Andrew > - switch statements for reading and writing suggested by Peter > - some small cleanups suggested by Alexey > > v3: > - didn't have each gpio set up as an irq > - now can't access set AC on ast2400 (only exists on ast2500) > - added ast2600 implementation (patch 3) > - renamed a couple of variables for clarity > > v2: Addressed Andrew's feedback, added debounce regs, renamed get/set to > read/write to minimise confusion with a 'set' of registers. > > Rashmica Gupta (3): > hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500 > aspeed: add a GPIO controller to the SoC > hw/gpio: Add in AST2600 specific implementation > > include/hw/arm/aspeed_soc.h |3 + > include/hw/gpio/aspeed_gpio.h | 100 > hw/arm/aspeed_soc.c | 17 + > hw/gpio/aspeed_gpio.c | 1006 + > hw/gpio/Makefile.objs |1 + > 5 files changed, 1127 insertions(+) > create mode 100644 include/hw/gpio/aspeed_gpio.h > create mode 100644 hw/gpio/aspeed_gpio.c >
[Qemu-devel] [PATCH v4 0/3] Add Aspeed GPIO controller model
v5: - integrated AspeedGPIOController fields into AspeedGPIOClass - separated ast2600_3_6v and ast2600_1_8v into two classes v4: - proper interupt handling thanks to Andrew - switch statements for reading and writing suggested by Peter - some small cleanups suggested by Alexey v3: - didn't have each gpio set up as an irq - now can't access set AC on ast2400 (only exists on ast2500) - added ast2600 implementation (patch 3) - renamed a couple of variables for clarity v2: Addressed Andrew's feedback, added debounce regs, renamed get/set to read/write to minimise confusion with a 'set' of registers. Rashmica Gupta (3): hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500 aspeed: add a GPIO controller to the SoC hw/gpio: Add in AST2600 specific implementation include/hw/arm/aspeed_soc.h |3 + include/hw/gpio/aspeed_gpio.h | 100 hw/arm/aspeed_soc.c | 17 + hw/gpio/aspeed_gpio.c | 1006 + hw/gpio/Makefile.objs |1 + 5 files changed, 1127 insertions(+) create mode 100644 include/hw/gpio/aspeed_gpio.h create mode 100644 hw/gpio/aspeed_gpio.c -- 2.20.1
Re: [Qemu-devel] [PATCH v4 0/3] Add Aspeed GPIO controller model
Patchew URL:
https://patchew.org/QEMU/20190814071433.22243-1-rashmic...@gmail.com/
Hi,
This series failed build test on s390x host. Please find the details below.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has the patches applied on top of "base"
# branch
set -e
echo
echo "=== ENV ==="
env
echo
echo "=== PACKAGES ==="
rpm -qa
echo
echo "=== UNAME ==="
uname -a
CC=$HOME/bin/cc
INSTALL=$PWD/install
BUILD=$PWD/build
mkdir -p $BUILD $INSTALL
SRC=$PWD
cd $BUILD
$SRC/configure --cc=$CC --prefix=$INSTALL
make -j4
# XXX: we need reliable clean up
# make check -j4 V=1
make install
=== TEST SCRIPT END ===
CC arm-softmmu/hw/gpio/aspeed_gpio.o
CC alpha-softmmu/hw/virtio/vhost-user-blk-pci.o
CC aarch64-softmmu/tcg/tcg-op-vec.o
/var/tmp/patchew-tester-tmp-by4iq4ex/src/hw/gpio/aspeed_gpio.c:837:6: error:
‘AspeedGPIOController’ {aka ‘const struct AspeedGPIOController’} has no member
named ‘mem_size’
837 | .mem_size = GPIO_3_6V_MEM_SIZE,
| ^~~~
/var/tmp/patchew-tester-tmp-by4iq4ex/src/hw/gpio/aspeed_gpio.c:844:6: error:
‘AspeedGPIOController’ {aka ‘const struct AspeedGPIOController’} has no member
named ‘mem_size’
844 | .mem_size = GPIO_1_8V_MEM_SIZE,
| ^~~~
make[1]: *** [/var/tmp/patchew-tester-tmp-by4iq4ex/src/rules.mak:69:
hw/gpio/aspeed_gpio.o] Error 1
---
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC aarch64-softmmu/hw/gpio/nrf51_gpio.o
CC aarch64-softmmu/hw/gpio/aspeed_gpio.o
/var/tmp/patchew-tester-tmp-by4iq4ex/src/hw/gpio/aspeed_gpio.c:837:6: error:
‘AspeedGPIOController’ {aka ‘const struct AspeedGPIOController’} has no member
named ‘mem_size’
837 | .mem_size = GPIO_3_6V_MEM_SIZE,
| ^~~~
/var/tmp/patchew-tester-tmp-by4iq4ex/src/hw/gpio/aspeed_gpio.c:844:6: error:
‘AspeedGPIOController’ {aka ‘const struct AspeedGPIOController’} has no member
named ‘mem_size’
844 | .mem_size = GPIO_1_8V_MEM_SIZE,
| ^~~~
make[1]: *** [/var/tmp/patchew-tester-tmp-by4iq4ex/src/rules.mak:69:
hw/gpio/aspeed_gpio.o] Error 1
The full log is available at
http://patchew.org/logs/20190814071433.22243-1-rashmic...@gmail.com/testing.s390x/?type=message.
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[Qemu-devel] [PATCH v4 0/3] Add Aspeed GPIO controller model
v4: - proper interupt handling thanks to Andrew - switch statements for reading and writing suggested by Peter - some small cleanups suggested by Alexey v3: - didn't have each gpio set up as an irq - now can't access set AC on ast2400 (only exists on ast2500) - added ast2600 implementation (patch 3) - renamed a couple of variables for clarity v2: Addressed Andrew's feedback, added debounce regs, renamed get/set to read/write to minimise confusion with a 'set' of registers. Rashmica Gupta (3): hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500 aspeed: add a GPIO controller to the SoC hw/gpio: Add in AST2600 specific implementation hw/arm/aspeed_soc.c | 17 + hw/gpio/Makefile.objs |1 + hw/gpio/aspeed_gpio.c | 1054 + include/hw/arm/aspeed_soc.h |3 + include/hw/gpio/aspeed_gpio.h | 107 slirp |2 +- 6 files changed, 1183 insertions(+), 1 deletion(-) create mode 100644 hw/gpio/aspeed_gpio.c create mode 100644 include/hw/gpio/aspeed_gpio.h -- 2.20.1
