Re: [Qemu-devel] [PULL] RISC-V: Fix riscv_isa_string g_new0 size calculation

[Peter Maydell]

On 9 March 2018 at 20:54, Michael Clark  wrote:
> Apologies for jumping the gun again with a PR before a review. It was most
> likely because I thought it was a critical bug fix.
>
> I'm incorporating Eric Blake's feedback.

For one-off "this is a build fix" bugfix patches, the simplest
thing is just to cc me on them and note (either in the commit
message or after the '---' separator) that it's a build fix.
Then I can just apply them directly to master once they've
been reviewed.

thanks
-- PMM

Re: [Qemu-devel] [PULL] RISC-V: Fix riscv_isa_string g_new0 size calculation

[Michael Clark]

Apologies for jumping the gun again with a PR before a review. It was most
likely because I thought it was a critical bug fix.

I'm incorporating Eric Blake's feedback.

On Sat, Mar 10, 2018 at 9:29 AM, Michael Clark  wrote:

> The following changes since commit e4ae62b802cec437f877f2cadc4ef0
> 59cc0eca76:
>
>   Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request'
> into staging (2018-03-09 17:28:16 +)
>
> are available in the git repository at:
>
>   https://github.com/michaeljclark/riscv-qemu.git fix-riscv-isa-string
>
> for you to fetch changes up to 32b3a5716062f805a42e1cae1df95f2f869a78c1:
>
>   RISC-V: Fix isa string logic bug, use popcount to count bits (2018-03-10
> 09:17:29 +1300)
>
> 
> Michael Clark (1):
>   RISC-V: Fix isa string logic bug, use popcount to count bits
>
>  target/riscv/cpu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

[Qemu-devel] [PULL] RISC-V: Fix riscv_isa_string g_new0 size calculation

[Michael Clark]

The following changes since commit e4ae62b802cec437f877f2cadc4ef059cc0eca76:

  Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into 
staging (2018-03-09 17:28:16 +)

are available in the git repository at:

  https://github.com/michaeljclark/riscv-qemu.git fix-riscv-isa-string

for you to fetch changes up to 32b3a5716062f805a42e1cae1df95f2f869a78c1:

  RISC-V: Fix isa string logic bug, use popcount to count bits (2018-03-10 
09:17:29 +1300)


Michael Clark (1):
  RISC-V: Fix isa string logic bug, use popcount to count bits

 target/riscv/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)