[Qemu-devel] [PULL 08/14] RISC-V: Fix CLINT timecmp low 32-bit writes

2018-12-26 Thread Palmer Dabbelt
From: Michael Clark A missing shift made updates to the low order bits of timecmp erroneously copy the old low order bits into the high order bits of the 64-bit timecmp register. Add the missing shift and rename timecmp local variables to timecmp_hi and timecmp_lo. This bug didn't show up as the

[Qemu-devel] [PULL 08/14] RISC-V: Fix CLINT timecmp low 32-bit writes

2018-12-21 Thread Palmer Dabbelt
From: Michael Clark A missing shift made updates to the low order bits of timecmp erroneously copy the old low order bits into the high order bits of the 64-bit timecmp register. Add the missing shift and rename timecmp local variables to timecmp_hi and timecmp_lo. This bug didn't show up as the