Use the translator macros to define translators required by AVX instructions.
Signed-off-by: Jan Bobek <jan.bo...@gmail.com> --- target/i386/translate.c | 48 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/target/i386/translate.c b/target/i386/translate.c index 14117c2993..9b9f0d4ed1 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -6708,10 +6708,12 @@ DEF_TRANSLATE_INSN2(Eq, Pq) DEF_TRANSLATE_INSN2(Eq, Vdq) DEF_TRANSLATE_INSN2(Gd, Nq) DEF_TRANSLATE_INSN2(Gd, Udq) +DEF_TRANSLATE_INSN2(Gd, Uqq) DEF_TRANSLATE_INSN2(Gd, Wd) DEF_TRANSLATE_INSN2(Gd, Wq) DEF_TRANSLATE_INSN2(Gq, Nq) DEF_TRANSLATE_INSN2(Gq, Udq) +DEF_TRANSLATE_INSN2(Gq, Uqq) DEF_TRANSLATE_INSN2(Gq, Wd) DEF_TRANSLATE_INSN2(Gq, Wq) DEF_TRANSLATE_INSN2(Md, Gd) @@ -6720,6 +6722,7 @@ DEF_TRANSLATE_INSN2(Mq, Gq) DEF_TRANSLATE_INSN2(Mq, Pq) DEF_TRANSLATE_INSN2(Mq, Vdq) DEF_TRANSLATE_INSN2(Mq, Vq) +DEF_TRANSLATE_INSN2(Mqq, Vqq) DEF_TRANSLATE_INSN2(Pq, Ed) DEF_TRANSLATE_INSN2(Pq, Eq) DEF_TRANSLATE_INSN2(Pq, Nq) @@ -6735,6 +6738,7 @@ DEF_TRANSLATE_INSN2(Vd, Wd) DEF_TRANSLATE_INSN2(Vd, Wq) DEF_TRANSLATE_INSN2(Vdq, Ed) DEF_TRANSLATE_INSN2(Vdq, Eq) +DEF_TRANSLATE_INSN2(Vdq, Md) DEF_TRANSLATE_INSN2(Vdq, Mdq) DEF_TRANSLATE_INSN2(Vdq, Nq) DEF_TRANSLATE_INSN2(Vdq, Qq) @@ -6742,14 +6746,22 @@ DEF_TRANSLATE_INSN2(Vdq, Udq) DEF_TRANSLATE_INSN2(Vdq, Wd) DEF_TRANSLATE_INSN2(Vdq, Wdq) DEF_TRANSLATE_INSN2(Vdq, Wq) +DEF_TRANSLATE_INSN2(Vdq, Wqq) DEF_TRANSLATE_INSN2(Vdq, Ww) DEF_TRANSLATE_INSN2(Vq, Ed) DEF_TRANSLATE_INSN2(Vq, Eq) DEF_TRANSLATE_INSN2(Vq, Wd) DEF_TRANSLATE_INSN2(Vq, Wq) +DEF_TRANSLATE_INSN2(Vqq, Md) +DEF_TRANSLATE_INSN2(Vqq, Mdq) +DEF_TRANSLATE_INSN2(Vqq, Mq) +DEF_TRANSLATE_INSN2(Vqq, Mqq) +DEF_TRANSLATE_INSN2(Vqq, Wdq) +DEF_TRANSLATE_INSN2(Vqq, Wqq) DEF_TRANSLATE_INSN2(Wd, Vd) DEF_TRANSLATE_INSN2(Wdq, Vdq) DEF_TRANSLATE_INSN2(Wq, Vq) +DEF_TRANSLATE_INSN2(Wqq, Vqq) DEF_TRANSLATE_INSN2(modrm_mod, modrm) #define DEF_TRANSLATE_INSN3(opT1, opT2, opT3) \ @@ -6796,6 +6808,9 @@ DEF_TRANSLATE_INSN3(Gd, Nq, Ib) DEF_TRANSLATE_INSN3(Gd, Udq, Ib) DEF_TRANSLATE_INSN3(Gq, Nq, Ib) DEF_TRANSLATE_INSN3(Gq, Udq, Ib) +DEF_TRANSLATE_INSN3(Hdq, Udq, Ib) +DEF_TRANSLATE_INSN3(Mdq, Hdq, Vdq) +DEF_TRANSLATE_INSN3(Mqq, Hqq, Vqq) DEF_TRANSLATE_INSN3(Nq, Nq, Ib) DEF_TRANSLATE_INSN3(Pq, Pq, Qd) DEF_TRANSLATE_INSN3(Pq, Pq, Qq) @@ -6803,17 +6818,34 @@ DEF_TRANSLATE_INSN3(Pq, Qq, Ib) DEF_TRANSLATE_INSN3(RdMb, Vdq, Ib) DEF_TRANSLATE_INSN3(RdMw, Vdq, Ib) DEF_TRANSLATE_INSN3(Udq, Udq, Ib) +DEF_TRANSLATE_INSN3(Vd, Hd, Ed) +DEF_TRANSLATE_INSN3(Vd, Hd, Eq) +DEF_TRANSLATE_INSN3(Vd, Hd, Wd) +DEF_TRANSLATE_INSN3(Vd, Hd, Wq) DEF_TRANSLATE_INSN3(Vd, Vd, Wd) DEF_TRANSLATE_INSN3(Vd, Wd, Ib) +DEF_TRANSLATE_INSN3(Vdq, Hdq, Mdq) +DEF_TRANSLATE_INSN3(Vdq, Hdq, Mq) +DEF_TRANSLATE_INSN3(Vdq, Hdq, UdqMhq) DEF_TRANSLATE_INSN3(Vdq, Hdq, Wdq) +DEF_TRANSLATE_INSN3(Vdq, Hq, Mq) +DEF_TRANSLATE_INSN3(Vdq, Hq, Wq) DEF_TRANSLATE_INSN3(Vdq, Vdq, Mq) DEF_TRANSLATE_INSN3(Vdq, Vdq, UdqMhq) DEF_TRANSLATE_INSN3(Vdq, Vdq, Wdq) DEF_TRANSLATE_INSN3(Vdq, Vq, Mq) DEF_TRANSLATE_INSN3(Vdq, Vq, Wq) DEF_TRANSLATE_INSN3(Vdq, Wdq, Ib) +DEF_TRANSLATE_INSN3(Vq, Hq, Ed) +DEF_TRANSLATE_INSN3(Vq, Hq, Eq) +DEF_TRANSLATE_INSN3(Vq, Hq, Wd) +DEF_TRANSLATE_INSN3(Vq, Hq, Wq) DEF_TRANSLATE_INSN3(Vq, Vq, Wq) DEF_TRANSLATE_INSN3(Vq, Wq, Ib) +DEF_TRANSLATE_INSN3(Vqq, Hqq, Mqq) +DEF_TRANSLATE_INSN3(Vqq, Hqq, Wqq) +DEF_TRANSLATE_INSN3(Vqq, Wqq, Ib) +DEF_TRANSLATE_INSN3(Wdq, Vqq, Ib) #define DEF_TRANSLATE_INSN4(opT1, opT2, opT3, opT4) \ static void translate_insn4(opT1, opT2, opT3, opT4)( \ @@ -6861,8 +6893,15 @@ DEF_TRANSLATE_INSN3(Vq, Wq, Ib) DEF_TRANSLATE_INSN4(Pq, Pq, Qq, Ib) DEF_TRANSLATE_INSN4(Pq, Pq, RdMw, Ib) +DEF_TRANSLATE_INSN4(Vd, Hd, Wd, Ib) DEF_TRANSLATE_INSN4(Vd, Vd, Wd, Ib) +DEF_TRANSLATE_INSN4(Vdq, Hdq, Ed, Ib) +DEF_TRANSLATE_INSN4(Vdq, Hdq, Eq, Ib) +DEF_TRANSLATE_INSN4(Vdq, Hdq, RdMb, Ib) +DEF_TRANSLATE_INSN4(Vdq, Hdq, RdMw, Ib) +DEF_TRANSLATE_INSN4(Vdq, Hdq, Wd, Ib) DEF_TRANSLATE_INSN4(Vdq, Hdq, Wdq, Ib) +DEF_TRANSLATE_INSN4(Vdq, Hdq, Wdq, Ldq) DEF_TRANSLATE_INSN4(Vdq, Vdq, Ed, Ib) DEF_TRANSLATE_INSN4(Vdq, Vdq, Eq, Ib) DEF_TRANSLATE_INSN4(Vdq, Vdq, RdMb, Ib) @@ -6871,7 +6910,11 @@ DEF_TRANSLATE_INSN4(Vdq, Vdq, Wd, Ib) DEF_TRANSLATE_INSN4(Vdq, Vdq, Wd, modrm_mod) DEF_TRANSLATE_INSN4(Vdq, Vdq, Wdq, Ib) DEF_TRANSLATE_INSN4(Vdq, Vdq, Wq, modrm_mod) +DEF_TRANSLATE_INSN4(Vq, Hq, Wq, Ib) DEF_TRANSLATE_INSN4(Vq, Vq, Wq, Ib) +DEF_TRANSLATE_INSN4(Vqq, Hqq, Wdq, Ib) +DEF_TRANSLATE_INSN4(Vqq, Hqq, Wqq, Ib) +DEF_TRANSLATE_INSN4(Vqq, Hqq, Wqq, Lqq) #define DEF_TRANSLATE_INSN5(opT1, opT2, opT3, opT4, opT5) \ static void translate_insn5(opT1, opT2, opT3, opT4, opT5)( \ @@ -6924,6 +6967,11 @@ DEF_TRANSLATE_INSN4(Vq, Vq, Wq, Ib) } \ } +DEF_TRANSLATE_INSN5(Vdq, Hdq, Wd, modrm_mod, vex_v) +DEF_TRANSLATE_INSN5(Vdq, Hdq, Wq, modrm_mod, vex_v) +DEF_TRANSLATE_INSN5(Wdq, Hdq, Vd, modrm_mod, vex_v) +DEF_TRANSLATE_INSN5(Wdq, Hdq, Vq, modrm_mod, vex_v) + #define OPCODE_GRP_BEGIN(grpname) \ static void translate_group(grpname)( \ CPUX86State *env, DisasContext *s, int modrm) \ -- 2.20.1