Re: [Qemu-devel] [SeaBIOS] [PATCH 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table

2015-06-01 Thread Gerd Hoffmann
On Sa, 2015-05-30 at 07:57 -0300, Paulo Alcantara wrote: Hi Gerd, On Thu, 28 May 2015 09:13:35 +0200 Gerd Hoffmann kra...@redhat.com wrote: +Scope(\_SB) { +OperationRegion (RCRB, SystemMemory, 0xfed1c000, 0x4000) Where does this address come from? This address is reserved

Re: [Qemu-devel] [SeaBIOS] [PATCH 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table

2015-06-01 Thread Paulo Alcantara
On Mon, June 1, 2015 4:16 am, Gerd Hoffmann wrote: On Sa, 2015-05-30 at 07:57 -0300, Paulo Alcantara wrote: Hi Gerd, On Thu, 28 May 2015 09:13:35 +0200 Gerd Hoffmann kra...@redhat.com wrote: +Scope(\_SB) { +OperationRegion (RCRB, SystemMemory, 0xfed1c000, 0x4000) Where does

Re: [Qemu-devel] [SeaBIOS] [PATCH 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table

2015-05-30 Thread Paulo Alcantara
Hi Gerd, On Thu, 28 May 2015 09:13:35 +0200 Gerd Hoffmann kra...@redhat.com wrote: +Scope(\_SB) { +OperationRegion (RCRB, SystemMemory, 0xfed1c000, 0x4000) Where does this address come from? This address is reserved in an ACPI DSDT table for Intel Haswell in Coreboot project,

Re: [Qemu-devel] [SeaBIOS] [PATCH 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table

2015-05-28 Thread Gerd Hoffmann
Hi, +Scope(\_SB) { +OperationRegion (RCRB, SystemMemory, 0xfed1c000, 0x4000) Where does this address come from? Is this a standard location suggested by intel specs? Or is the firmware free to choose it? cheers, Gerd