Hi, I'm a GSoC student and I have completed my project "Generic PCIE-PCI Bridge". Its aim was to create a new device to replace existing DMI-PCI bridge as it isn't cross-platform and doesn't support hotplugging. By completing this project next goals were achieved: 1. Introduce a brand new pcie-pci-bridge device. 2. Add SHPC support to the Q35 machine in order to enable device hotplugging into the PCIE-PCI bridge. 3. Fix disabled BUSMASTER bug in Linux kernel. 4. Add QEMU-specific bridge-only PCI capability for additional resources reservation, such as additional bus number, IO/MEM/PREF space. The capability usage was implemented in QEMU and SeaBIOS both. 5. Update documentation according to the changes stated above.
All QEMU and SeaBIOS patches have got reviewed-by and tested-by tags. Linux kernel patches has been accepted for merge in 4.14 version. Some QEMU (and therefore all SeaBIOS) patches hasn't been merged yet because of current freeze. But I'm ready to push the patches when it becomes possible (even though GSoC ends in a week). At the moment in QEMU only ACPI refactoring and SHPC-enabling patches are merged upstream. QEMU series link: http://lists.gnu.org/archive/html/qemu-devel/2017-08/msg03288.html SeaBIOS series link: https://mail.coreboot.org/pipermail/seabios/2017-August/011728.html Linux patch link: http://www.spinics.net/lists/linux-pci/msg63052.html QEMU part github: https://github.com/zuban32/qemu/commits/v7?author=zuban32 SeaBIOS part github: https://github.com/zuban32/seabios/commits/qemu_res_cap?author=zuban32 -- Aleksandr Bezzubikov