On Sun, 2007-10-14 at 15:59 +0300, Blue Swirl wrote:
On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote:
Here's an updated version of the patch against current CVS.
This patches provides reverse-endian, little-endian and big-endian
memory accessors, available with and without softmmu. It also
On 10/15/07, Blue Swirl [EMAIL PROTECTED] wrote:
On 10/15/07, J. Mayer [EMAIL PROTECTED] wrote:
On Sun, 2007-10-14 at 15:59 +0300, Blue Swirl wrote:
On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote:
Here's an updated version of the patch against current CVS.
This patches provides
On Mon, 2007-10-15 at 19:02 +0300, Blue Swirl wrote:
On 10/15/07, J. Mayer [EMAIL PROTECTED] wrote:
On Sun, 2007-10-14 at 15:59 +0300, Blue Swirl wrote:
On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote:
Here's an updated version of the patch against current CVS.
This patches provides
On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote:
On Sat, 2007-10-13 at 16:17 +0200, J. Mayer wrote:
On Sat, 2007-10-13 at 16:07 +0300, Blue Swirl wrote:
On 10/13/07, J. Mayer [EMAIL PROTECTED] wrote:
On Sat, 2007-10-13 at 13:47 +0300, Blue Swirl wrote:
On 10/13/07, J. Mayer [EMAIL
On Sun, 2007-10-14 at 11:19 +0300, Blue Swirl wrote:
On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote:
On Sat, 2007-10-13 at 16:17 +0200, J. Mayer wrote:
On Sat, 2007-10-13 at 16:07 +0300, Blue Swirl wrote:
On 10/13/07, J. Mayer [EMAIL PROTECTED] wrote:
On Sat, 2007-10-13 at 13:47
On 10/14/07, J. Mayer [EMAIL PROTECTED] wrote:
Here's an updated version of the patch against current CVS.
This patches provides reverse-endian, little-endian and big-endian
memory accessors, available with and without softmmu. It also provides
an IO_MEM_REVERSE TLB flag to allow future
J. Mayer wrote:
[snip]
Here's a new version. The only change is that, for consistency, I did
add the big-endian and little-endian accessors that were documented in
cpu-all.h as unimplemented. The implementation is quite trivial, having
native and reverse-endian accessors available, and
On 10/13/07, J. Mayer [EMAIL PROTECTED] wrote:
The problem:
some CPU architectures, namely PowerPC and maybe others, offers
facilities to access the memory or I/O in the reverse endianness, ie
little-endian instead of big-endian for PowerPC, or provide instruction
to make memory accesses in
Blue Swirl wrote:
On 10/13/07, J. Mayer [EMAIL PROTECTED] wrote:
The problem:
some CPU architectures, namely PowerPC and maybe others, offers
facilities to access the memory or I/O in the reverse endianness, ie
little-endian instead of big-endian for PowerPC, or provide instruction
to
On 10/13/07, J. Mayer [EMAIL PROTECTED] wrote:
On Sat, 2007-10-13 at 13:47 +0300, Blue Swirl wrote:
On 10/13/07, J. Mayer [EMAIL PROTECTED] wrote:
The problem:
some CPU architectures, namely PowerPC and maybe others, offers
facilities to access the memory or I/O in the reverse
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