2010/6/9 Blue Swirl blauwir...@gmail.com:
On Fri, Jun 4, 2010 at 8:30 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/4 Blue Swirl blauwir...@gmail.com:
On Tue, Jun 1, 2010 at 8:16 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/1 Blue Swirl blauwir...@gmail.com:
On
On Fri, Jun 4, 2010 at 8:30 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/4 Blue Swirl blauwir...@gmail.com:
On Tue, Jun 1, 2010 at 8:16 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/1 Blue Swirl blauwir...@gmail.com:
On Tue, Jun 1, 2010 at 7:56 PM, Artyom
2010/6/4 Blue Swirl blauwir...@gmail.com:
On Tue, Jun 1, 2010 at 8:16 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/1 Blue Swirl blauwir...@gmail.com:
On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/1 Blue Swirl blauwir...@gmail.com:
On
On Tue, Jun 1, 2010 at 8:16 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/1 Blue Swirl blauwir...@gmail.com:
On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/1 Blue Swirl blauwir...@gmail.com:
On Sun, May 30, 2010 at 10:35 PM, Artyom
On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
lower interrupt during chip reset. Otherwise the ESP_RSTAT register
may get out of sync with the IRQ line status. This effect became
visible after commit 65899fe3
Hard reset handlers should not touch qemu_irqs,
2010/6/1 Blue Swirl blauwir...@gmail.com:
On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
lower interrupt during chip reset. Otherwise the ESP_RSTAT register
may get out of sync with the IRQ line status. This effect became
visible after commit 65899fe3
On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/1 Blue Swirl blauwir...@gmail.com:
On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
lower interrupt during chip reset. Otherwise the ESP_RSTAT register
may get out of sync
2010/6/1 Blue Swirl blauwir...@gmail.com:
On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/6/1 Blue Swirl blauwir...@gmail.com:
On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
lower interrupt during chip reset. Otherwise